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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-19 22:36:49 +07:00
109ec55837
Switch over to dynamically creating device attributes, which are in turn used by the perf core to expose available counters in sysfs. This way we do not expose counters which are not avaiable on the current platform, and are so more consistent between what we reply to open attempts via the perf_event_open(2), and what is discoverable in sysfs. v2: * Simplify attribute pointer freeing loop. * Changed attr init from macro to function. * More common error unwind. (Chris Wilson) * Rename some locals. (Chris Wilson) v3: * Fixed double semi-colon. (Chris Wilson) Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Cc: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Link: https://patchwork.freedesktop.org/patch/msgid/20180111083525.32394-1-tvrtko.ursulin@linux.intel.com
120 lines
3.8 KiB
C
120 lines
3.8 KiB
C
/*
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* Copyright © 2017 Intel Corporation
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
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* IN THE SOFTWARE.
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*
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*/
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#ifndef __I915_PMU_H__
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#define __I915_PMU_H__
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enum {
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__I915_SAMPLE_FREQ_ACT = 0,
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__I915_SAMPLE_FREQ_REQ,
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__I915_NUM_PMU_SAMPLERS
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};
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/**
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* How many different events we track in the global PMU mask.
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*
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* It is also used to know to needed number of event reference counters.
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*/
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#define I915_PMU_MASK_BITS \
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((1 << I915_PMU_SAMPLE_BITS) + \
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(I915_PMU_LAST + 1 - __I915_PMU_OTHER(0)))
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struct i915_pmu_sample {
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u64 cur;
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};
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struct i915_pmu {
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/**
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* @node: List node for CPU hotplug handling.
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*/
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struct hlist_node node;
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/**
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* @base: PMU base.
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*/
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struct pmu base;
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/**
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* @lock: Lock protecting enable mask and ref count handling.
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*/
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spinlock_t lock;
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/**
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* @timer: Timer for internal i915 PMU sampling.
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*/
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struct hrtimer timer;
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/**
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* @enable: Bitmask of all currently enabled events.
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*
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* Bits are derived from uAPI event numbers in a way that low 16 bits
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* correspond to engine event _sample_ _type_ (I915_SAMPLE_QUEUED is
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* bit 0), and higher bits correspond to other events (for instance
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* I915_PMU_ACTUAL_FREQUENCY is bit 16 etc).
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*
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* In other words, low 16 bits are not per engine but per engine
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* sampler type, while the upper bits are directly mapped to other
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* event types.
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*/
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u64 enable;
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/**
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* @enable_count: Reference counts for the enabled events.
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*
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* Array indices are mapped in the same way as bits in the @enable field
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* and they are used to control sampling on/off when multiple clients
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* are using the PMU API.
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*/
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unsigned int enable_count[I915_PMU_MASK_BITS];
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/**
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* @timer_enabled: Should the internal sampling timer be running.
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*/
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bool timer_enabled;
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/**
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* @sample: Current and previous (raw) counters for sampling events.
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*
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* These counters are updated from the i915 PMU sampling timer.
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*
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* Only global counters are held here, while the per-engine ones are in
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* struct intel_engine_cs.
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*/
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struct i915_pmu_sample sample[__I915_NUM_PMU_SAMPLERS];
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/**
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* @i915_attr: Memory block holding device attributes.
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*/
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void *i915_attr;
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/**
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* @pmu_attr: Memory block holding device attributes.
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*/
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void *pmu_attr;
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};
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#ifdef CONFIG_PERF_EVENTS
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void i915_pmu_register(struct drm_i915_private *i915);
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void i915_pmu_unregister(struct drm_i915_private *i915);
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void i915_pmu_gt_parked(struct drm_i915_private *i915);
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void i915_pmu_gt_unparked(struct drm_i915_private *i915);
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#else
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static inline void i915_pmu_register(struct drm_i915_private *i915) {}
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static inline void i915_pmu_unregister(struct drm_i915_private *i915) {}
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static inline void i915_pmu_gt_parked(struct drm_i915_private *i915) {}
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static inline void i915_pmu_gt_unparked(struct drm_i915_private *i915) {}
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#endif
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#endif
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