mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2025-01-22 01:23:07 +07:00
0807caf647
Add a binding document for the Broadcom STB reset controller, also known as SW_INIT-style reset controller. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
28 lines
673 B
Plaintext
28 lines
673 B
Plaintext
Broadcom STB SW_INIT-style reset controller
|
|
===========================================
|
|
|
|
Broadcom STB SoCs have a SW_INIT-style reset controller with separate
|
|
SET/CLEAR/STATUS registers and possibly multiple banks, each of 32 bit
|
|
reset lines.
|
|
|
|
Please also refer to reset.txt in this directory for common reset
|
|
controller binding usage.
|
|
|
|
Required properties:
|
|
- compatible: should be brcm,brcmstb-reset
|
|
- reg: register base and length
|
|
- #reset-cells: must be set to 1
|
|
|
|
Example:
|
|
|
|
reset: reset-controller@8404318 {
|
|
compatible = "brcm,brcmstb-reset";
|
|
reg = <0x8404318 0x30>;
|
|
#reset-cells = <1>;
|
|
};
|
|
|
|
ðernet_switch {
|
|
resets = <&reset>;
|
|
reset-names = "switch";
|
|
};
|