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5c1ea08215
The RT team has been searching for a nasty latency. This latency shows
up out of the blue and has been seen to be as big as 5ms!
Using ftrace I found the cause of the latency.
pcscd-2995 3dNh1 52360300us : irq_exit (smp_apic_timer_interrupt)
pcscd-2995 3dN.2 52360301us : idle_cpu (irq_exit)
pcscd-2995 3dN.2 52360301us : rcu_irq_exit (irq_exit)
pcscd-2995 3dN.1 52360771us : smp_apic_timer_interrupt (apic_timer_interrupt
)
pcscd-2995 3dN.1 52360771us : exit_idle (smp_apic_timer_interrupt)
Here's an example of a 400 us latency. pcscd took a timer interrupt and
returned with "need resched" enabled, but did not reschedule until after
the next interrupt came in at 52360771us 400us later!
At first I thought we somehow missed a preemption check in entry.S. But
I also noticed that this always seemed to happen during a __delay call.
pcscd-2995 3dN.2 52360836us : rcu_irq_exit (irq_exit)
pcscd-2995 3.N.. 52361265us : preempt_schedule (__delay)
Looking at the x86 delay, I found my problem.
In git commit 35d5d08a08, Andrew Morton
placed preempt_disable around the entire delay due to TSC's not working
nicely on SMP. Unfortunately for those that care about latencies this
is devastating! Especially when we have callers to mdelay(8).
Here I enable preemption during the loop and account for anytime the task
migrates to a new CPU. The delay asked for may be extended a bit by
the migration, but delay only guarantees that it will delay for that minimum
time. Delaying longer should not be an issue.
[
Thanks to Thomas Gleixner for spotting that cpu wasn't updated,
and to place the rep_nop between preempt_enabled/disable.
]
Signed-off-by: Steven Rostedt <srostedt@redhat.com>
Cc: akpm@osdl.org
Cc: Clark Williams <clark.williams@gmail.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: "Luis Claudio R. Goncalves" <lclaudio@uudg.org>
Cc: Gregory Haskins <ghaskins@novell.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Andi Kleen <andi-suse@firstfloor.org>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
86 lines
1.8 KiB
C
86 lines
1.8 KiB
C
/*
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* Precise Delay Loops for x86-64
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*
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* Copyright (C) 1993 Linus Torvalds
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* Copyright (C) 1997 Martin Mares <mj@atrey.karlin.mff.cuni.cz>
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*
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* The __delay function must _NOT_ be inlined as its execution time
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* depends wildly on alignment on many x86 processors.
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*/
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#include <linux/module.h>
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#include <linux/sched.h>
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#include <linux/timex.h>
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#include <linux/preempt.h>
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#include <linux/delay.h>
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#include <linux/init.h>
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#include <asm/delay.h>
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#include <asm/msr.h>
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#ifdef CONFIG_SMP
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#include <asm/smp.h>
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#endif
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int __devinit read_current_timer(unsigned long *timer_value)
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{
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rdtscll(*timer_value);
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return 0;
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}
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void __delay(unsigned long loops)
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{
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unsigned bclock, now;
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int cpu;
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preempt_disable();
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cpu = smp_processor_id();
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rdtscl(bclock);
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for (;;) {
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rdtscl(now);
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if ((now - bclock) >= loops)
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break;
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/* Allow RT tasks to run */
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preempt_enable();
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rep_nop();
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preempt_disable();
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/*
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* It is possible that we moved to another CPU, and
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* since TSC's are per-cpu we need to calculate
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* that. The delay must guarantee that we wait "at
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* least" the amount of time. Being moved to another
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* CPU could make the wait longer but we just need to
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* make sure we waited long enough. Rebalance the
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* counter for this CPU.
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*/
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if (unlikely(cpu != smp_processor_id())) {
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loops -= (now - bclock);
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cpu = smp_processor_id();
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rdtscl(bclock);
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}
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}
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preempt_enable();
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}
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EXPORT_SYMBOL(__delay);
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inline void __const_udelay(unsigned long xloops)
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{
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__delay(((xloops * HZ *
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cpu_data(raw_smp_processor_id()).loops_per_jiffy) >> 32) + 1);
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}
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EXPORT_SYMBOL(__const_udelay);
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void __udelay(unsigned long usecs)
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{
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__const_udelay(usecs * 0x000010c7); /* 2**32 / 1000000 (rounded up) */
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}
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EXPORT_SYMBOL(__udelay);
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void __ndelay(unsigned long nsecs)
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{
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__const_udelay(nsecs * 0x00005); /* 2**32 / 1000000000 (rounded up) */
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}
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EXPORT_SYMBOL(__ndelay);
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