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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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30d6e0a419
There is code duplicated over all architecture's headers for futex_atomic_op_inuser. Namely op decoding, access_ok check for uaddr, and comparison of the result. Remove this duplication and leave up to the arches only the needed assembly which is now in arch_futex_atomic_op_inuser. This effectively distributes the Will Deacon's arm64 fix for undefined behaviour reported by UBSAN to all architectures. The fix was done in commit5f16a046f8(arm64: futex: Fix undefined behaviour with FUTEX_OP_OPARG_SHIFT usage). Look there for an example dump. And as suggested by Thomas, check for negative oparg too, because it was also reported to cause undefined behaviour report. Note that s390 removed access_ok check ind12a29703("s390/uaccess: remove pointless access_ok() checks") as access_ok there returns true. We introduce it back to the helper for the sake of simplicity (it gets optimized away anyway). Signed-off-by: Jiri Slaby <jslaby@suse.cz> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Acked-by: Russell King <rmk+kernel@armlinux.org.uk> Acked-by: Michael Ellerman <mpe@ellerman.id.au> (powerpc) Acked-by: Heiko Carstens <heiko.carstens@de.ibm.com> [s390] Acked-by: Chris Metcalf <cmetcalf@mellanox.com> [for tile] Reviewed-by: Darren Hart (VMware) <dvhart@infradead.org> Reviewed-by: Will Deacon <will.deacon@arm.com> [core/arm64] Cc: linux-mips@linux-mips.org Cc: Rich Felker <dalias@libc.org> Cc: linux-ia64@vger.kernel.org Cc: linux-sh@vger.kernel.org Cc: peterz@infradead.org Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Max Filippov <jcmvbkbc@gmail.com> Cc: Paul Mackerras <paulus@samba.org> Cc: sparclinux@vger.kernel.org Cc: Jonas Bonn <jonas@southpole.se> Cc: linux-s390@vger.kernel.org Cc: linux-arch@vger.kernel.org Cc: Yoshinori Sato <ysato@users.sourceforge.jp> Cc: linux-hexagon@vger.kernel.org Cc: Helge Deller <deller@gmx.de> Cc: "James E.J. Bottomley" <jejb@parisc-linux.org> Cc: Catalin Marinas <catalin.marinas@arm.com> Cc: Matt Turner <mattst88@gmail.com> Cc: linux-snps-arc@lists.infradead.org Cc: Fenghua Yu <fenghua.yu@intel.com> Cc: Arnd Bergmann <arnd@arndb.de> Cc: linux-xtensa@linux-xtensa.org Cc: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi> Cc: openrisc@lists.librecores.org Cc: Ivan Kokshaysky <ink@jurassic.park.msu.ru> Cc: Stafford Horne <shorne@gmail.com> Cc: linux-arm-kernel@lists.infradead.org Cc: Richard Henderson <rth@twiddle.net> Cc: Chris Zankel <chris@zankel.net> Cc: Michal Simek <monstr@monstr.eu> Cc: Tony Luck <tony.luck@intel.com> Cc: linux-parisc@vger.kernel.org Cc: Vineet Gupta <vgupta@synopsys.com> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Richard Kuo <rkuo@codeaurora.org> Cc: linux-alpha@vger.kernel.org Cc: Martin Schwidefsky <schwidefsky@de.ibm.com> Cc: linuxppc-dev@lists.ozlabs.org Cc: "David S. Miller" <davem@davemloft.net> Link: http://lkml.kernel.org/r/20170824073105.3901-1-jslaby@suse.cz
127 lines
2.9 KiB
C
127 lines
2.9 KiB
C
/*
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* Copyright (C) 2012 ARM Ltd.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef __ASM_FUTEX_H
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#define __ASM_FUTEX_H
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#ifdef __KERNEL__
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#include <linux/futex.h>
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#include <linux/uaccess.h>
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#include <asm/errno.h>
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#define __futex_atomic_op(insn, ret, oldval, uaddr, tmp, oparg) \
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do { \
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uaccess_enable(); \
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asm volatile( \
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" prfm pstl1strm, %2\n" \
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"1: ldxr %w1, %2\n" \
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insn "\n" \
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"2: stlxr %w3, %w0, %2\n" \
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" cbnz %w3, 1b\n" \
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" dmb ish\n" \
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"3:\n" \
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" .pushsection .fixup,\"ax\"\n" \
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" .align 2\n" \
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"4: mov %w0, %w5\n" \
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" b 3b\n" \
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" .popsection\n" \
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_ASM_EXTABLE(1b, 4b) \
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_ASM_EXTABLE(2b, 4b) \
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: "=&r" (ret), "=&r" (oldval), "+Q" (*uaddr), "=&r" (tmp) \
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: "r" (oparg), "Ir" (-EFAULT) \
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: "memory"); \
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uaccess_disable(); \
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} while (0)
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static inline int
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arch_futex_atomic_op_inuser(int op, int oparg, int *oval, u32 __user *uaddr)
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{
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int oldval = 0, ret, tmp;
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pagefault_disable();
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switch (op) {
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case FUTEX_OP_SET:
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__futex_atomic_op("mov %w0, %w4",
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ret, oldval, uaddr, tmp, oparg);
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break;
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case FUTEX_OP_ADD:
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__futex_atomic_op("add %w0, %w1, %w4",
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ret, oldval, uaddr, tmp, oparg);
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break;
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case FUTEX_OP_OR:
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__futex_atomic_op("orr %w0, %w1, %w4",
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ret, oldval, uaddr, tmp, oparg);
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break;
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case FUTEX_OP_ANDN:
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__futex_atomic_op("and %w0, %w1, %w4",
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ret, oldval, uaddr, tmp, ~oparg);
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break;
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case FUTEX_OP_XOR:
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__futex_atomic_op("eor %w0, %w1, %w4",
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ret, oldval, uaddr, tmp, oparg);
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break;
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default:
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ret = -ENOSYS;
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}
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pagefault_enable();
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if (!ret)
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*oval = oldval;
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return ret;
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}
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static inline int
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futex_atomic_cmpxchg_inatomic(u32 *uval, u32 __user *uaddr,
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u32 oldval, u32 newval)
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{
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int ret = 0;
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u32 val, tmp;
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if (!access_ok(VERIFY_WRITE, uaddr, sizeof(u32)))
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return -EFAULT;
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uaccess_enable();
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asm volatile("// futex_atomic_cmpxchg_inatomic\n"
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" prfm pstl1strm, %2\n"
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"1: ldxr %w1, %2\n"
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" sub %w3, %w1, %w4\n"
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" cbnz %w3, 3f\n"
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"2: stlxr %w3, %w5, %2\n"
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" cbnz %w3, 1b\n"
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" dmb ish\n"
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"3:\n"
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" .pushsection .fixup,\"ax\"\n"
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"4: mov %w0, %w6\n"
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" b 3b\n"
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" .popsection\n"
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_ASM_EXTABLE(1b, 4b)
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_ASM_EXTABLE(2b, 4b)
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: "+r" (ret), "=&r" (val), "+Q" (*uaddr), "=&r" (tmp)
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: "r" (oldval), "r" (newval), "Ir" (-EFAULT)
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: "memory");
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uaccess_disable();
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*uval = val;
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return ret;
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}
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#endif /* __KERNEL__ */
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#endif /* __ASM_FUTEX_H */
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