mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-21 18:27:13 +07:00
4f44c4eec5
Move the clearing of the common registers (not 64-bit-only) to the start of the flow that clears registers holding guest state. This is purely a cosmetic change so that the label doesn't point at a blank line and a #define. No functional change intended. Signed-off-by: Sean Christopherson <sean.j.christopherson@intel.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
225 lines
5.4 KiB
ArmAsm
225 lines
5.4 KiB
ArmAsm
/* SPDX-License-Identifier: GPL-2.0 */
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#include <linux/linkage.h>
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#include <asm/asm.h>
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#include <asm/bitsperlong.h>
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#include <asm/kvm_vcpu_regs.h>
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#define WORD_SIZE (BITS_PER_LONG / 8)
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#define VCPU_RAX __VCPU_REGS_RAX * WORD_SIZE
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#define VCPU_RCX __VCPU_REGS_RCX * WORD_SIZE
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#define VCPU_RDX __VCPU_REGS_RDX * WORD_SIZE
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#define VCPU_RBX __VCPU_REGS_RBX * WORD_SIZE
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/* Intentionally omit RSP as it's context switched by hardware */
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#define VCPU_RBP __VCPU_REGS_RBP * WORD_SIZE
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#define VCPU_RSI __VCPU_REGS_RSI * WORD_SIZE
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#define VCPU_RDI __VCPU_REGS_RDI * WORD_SIZE
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#ifdef CONFIG_X86_64
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#define VCPU_R8 __VCPU_REGS_R8 * WORD_SIZE
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#define VCPU_R9 __VCPU_REGS_R9 * WORD_SIZE
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#define VCPU_R10 __VCPU_REGS_R10 * WORD_SIZE
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#define VCPU_R11 __VCPU_REGS_R11 * WORD_SIZE
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#define VCPU_R12 __VCPU_REGS_R12 * WORD_SIZE
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#define VCPU_R13 __VCPU_REGS_R13 * WORD_SIZE
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#define VCPU_R14 __VCPU_REGS_R14 * WORD_SIZE
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#define VCPU_R15 __VCPU_REGS_R15 * WORD_SIZE
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#endif
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.text
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/**
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* vmx_vmenter - VM-Enter the current loaded VMCS
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*
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* %RFLAGS.ZF: !VMCS.LAUNCHED, i.e. controls VMLAUNCH vs. VMRESUME
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*
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* Returns:
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* %RFLAGS.CF is set on VM-Fail Invalid
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* %RFLAGS.ZF is set on VM-Fail Valid
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* %RFLAGS.{CF,ZF} are cleared on VM-Success, i.e. VM-Exit
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*
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* Note that VMRESUME/VMLAUNCH fall-through and return directly if
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* they VM-Fail, whereas a successful VM-Enter + VM-Exit will jump
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* to vmx_vmexit.
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*/
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ENTRY(vmx_vmenter)
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/* EFLAGS.ZF is set if VMCS.LAUNCHED == 0 */
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je 2f
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1: vmresume
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ret
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2: vmlaunch
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ret
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3: cmpb $0, kvm_rebooting
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jne 4f
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call kvm_spurious_fault
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4: ret
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.pushsection .fixup, "ax"
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5: jmp 3b
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.popsection
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_ASM_EXTABLE(1b, 5b)
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_ASM_EXTABLE(2b, 5b)
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ENDPROC(vmx_vmenter)
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/**
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* vmx_vmexit - Handle a VMX VM-Exit
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*
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* Returns:
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* %RFLAGS.{CF,ZF} are cleared on VM-Success, i.e. VM-Exit
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*
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* This is vmx_vmenter's partner in crime. On a VM-Exit, control will jump
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* here after hardware loads the host's state, i.e. this is the destination
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* referred to by VMCS.HOST_RIP.
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*/
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ENTRY(vmx_vmexit)
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ret
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ENDPROC(vmx_vmexit)
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/**
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* __vmx_vcpu_run - Run a vCPU via a transition to VMX guest mode
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* @vmx: struct vcpu_vmx *
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* @regs: unsigned long * (to guest registers)
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* @launched: %true if the VMCS has been launched
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*
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* Returns:
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* 0 on VM-Exit, 1 on VM-Fail
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*/
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ENTRY(__vmx_vcpu_run)
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push %_ASM_BP
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mov %_ASM_SP, %_ASM_BP
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#ifdef CONFIG_X86_64
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push %r15
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push %r14
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push %r13
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push %r12
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#else
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push %edi
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push %esi
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#endif
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push %_ASM_BX
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/*
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* Save @regs, _ASM_ARG2 may be modified by vmx_update_host_rsp() and
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* @regs is needed after VM-Exit to save the guest's register values.
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*/
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push %_ASM_ARG2
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/* Copy @launched to BL, _ASM_ARG3 is volatile. */
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mov %_ASM_ARG3B, %bl
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/* Adjust RSP to account for the CALL to vmx_vmenter(). */
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lea -WORD_SIZE(%_ASM_SP), %_ASM_ARG2
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call vmx_update_host_rsp
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/* Load @regs to RAX. */
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mov (%_ASM_SP), %_ASM_AX
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/* Check if vmlaunch or vmresume is needed */
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cmpb $0, %bl
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/* Load guest registers. Don't clobber flags. */
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mov VCPU_RBX(%_ASM_AX), %_ASM_BX
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mov VCPU_RCX(%_ASM_AX), %_ASM_CX
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mov VCPU_RDX(%_ASM_AX), %_ASM_DX
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mov VCPU_RSI(%_ASM_AX), %_ASM_SI
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mov VCPU_RDI(%_ASM_AX), %_ASM_DI
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mov VCPU_RBP(%_ASM_AX), %_ASM_BP
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#ifdef CONFIG_X86_64
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mov VCPU_R8 (%_ASM_AX), %r8
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mov VCPU_R9 (%_ASM_AX), %r9
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mov VCPU_R10(%_ASM_AX), %r10
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mov VCPU_R11(%_ASM_AX), %r11
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mov VCPU_R12(%_ASM_AX), %r12
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mov VCPU_R13(%_ASM_AX), %r13
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mov VCPU_R14(%_ASM_AX), %r14
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mov VCPU_R15(%_ASM_AX), %r15
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#endif
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/* Load guest RAX. This kills the vmx_vcpu pointer! */
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mov VCPU_RAX(%_ASM_AX), %_ASM_AX
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/* Enter guest mode */
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call vmx_vmenter
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/* Jump on VM-Fail. */
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jbe 2f
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/* Temporarily save guest's RAX. */
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push %_ASM_AX
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/* Reload @regs to RAX. */
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mov WORD_SIZE(%_ASM_SP), %_ASM_AX
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/* Save all guest registers, including RAX from the stack */
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__ASM_SIZE(pop) VCPU_RAX(%_ASM_AX)
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mov %_ASM_BX, VCPU_RBX(%_ASM_AX)
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mov %_ASM_CX, VCPU_RCX(%_ASM_AX)
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mov %_ASM_DX, VCPU_RDX(%_ASM_AX)
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mov %_ASM_SI, VCPU_RSI(%_ASM_AX)
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mov %_ASM_DI, VCPU_RDI(%_ASM_AX)
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mov %_ASM_BP, VCPU_RBP(%_ASM_AX)
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#ifdef CONFIG_X86_64
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mov %r8, VCPU_R8 (%_ASM_AX)
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mov %r9, VCPU_R9 (%_ASM_AX)
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mov %r10, VCPU_R10(%_ASM_AX)
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mov %r11, VCPU_R11(%_ASM_AX)
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mov %r12, VCPU_R12(%_ASM_AX)
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mov %r13, VCPU_R13(%_ASM_AX)
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mov %r14, VCPU_R14(%_ASM_AX)
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mov %r15, VCPU_R15(%_ASM_AX)
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#endif
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/* Clear RAX to indicate VM-Exit (as opposed to VM-Fail). */
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xor %eax, %eax
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/*
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* Clear all general purpose registers except RSP and RAX to prevent
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* speculative use of the guest's values, even those that are reloaded
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* via the stack. In theory, an L1 cache miss when restoring registers
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* could lead to speculative execution with the guest's values.
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* Zeroing XORs are dirt cheap, i.e. the extra paranoia is essentially
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* free. RSP and RAX are exempt as RSP is restored by hardware during
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* VM-Exit and RAX is explicitly loaded with 0 or 1 to return VM-Fail.
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*/
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1: xor %ebx, %ebx
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xor %ecx, %ecx
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xor %edx, %edx
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xor %esi, %esi
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xor %edi, %edi
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xor %ebp, %ebp
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#ifdef CONFIG_X86_64
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xor %r8d, %r8d
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xor %r9d, %r9d
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xor %r10d, %r10d
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xor %r11d, %r11d
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xor %r12d, %r12d
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xor %r13d, %r13d
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xor %r14d, %r14d
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xor %r15d, %r15d
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#endif
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/* "POP" @regs. */
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add $WORD_SIZE, %_ASM_SP
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pop %_ASM_BX
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#ifdef CONFIG_X86_64
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pop %r12
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pop %r13
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pop %r14
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pop %r15
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#else
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pop %esi
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pop %edi
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#endif
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pop %_ASM_BP
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ret
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/* VM-Fail. Out-of-line to avoid a taken Jcc after VM-Exit. */
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2: mov $1, %eax
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jmp 1b
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ENDPROC(__vmx_vcpu_run)
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