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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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289569f902
Add Interrupt Collector (ICOLL) support for MXS-based. Signed-off-by: Shawn Guo <shawn.guo@freescale.com> Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
82 lines
2.3 KiB
C
82 lines
2.3 KiB
C
/*
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* Copyright (C) 2009-2010 Freescale Semiconductor, Inc. All Rights Reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
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*/
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/irq.h>
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#include <linux/io.h>
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#include <mach/mxs.h>
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#include <mach/common.h>
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#define HW_ICOLL_VECTOR 0x0000
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#define HW_ICOLL_LEVELACK 0x0010
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#define HW_ICOLL_CTRL 0x0020
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#define HW_ICOLL_INTERRUPTn_SET(n) (0x0124 + (n) * 0x10)
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#define HW_ICOLL_INTERRUPTn_CLR(n) (0x0128 + (n) * 0x10)
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#define BM_ICOLL_INTERRUPTn_ENABLE 0x00000004
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#define BV_ICOLL_LEVELACK_IRQLEVELACK__LEVEL0 0x1
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static void __iomem *icoll_base = MXS_IO_ADDRESS(MXS_ICOLL_BASE_ADDR);
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static void icoll_ack_irq(unsigned int irq)
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{
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/*
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* The Interrupt Collector is able to prioritize irqs.
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* Currently only level 0 is used. So acking can use
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* BV_ICOLL_LEVELACK_IRQLEVELACK__LEVEL0 unconditionally.
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*/
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__raw_writel(BV_ICOLL_LEVELACK_IRQLEVELACK__LEVEL0,
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icoll_base + HW_ICOLL_LEVELACK);
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}
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static void icoll_mask_irq(unsigned int irq)
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{
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__raw_writel(BM_ICOLL_INTERRUPTn_ENABLE,
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icoll_base + HW_ICOLL_INTERRUPTn_CLR(irq));
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}
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static void icoll_unmask_irq(unsigned int irq)
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{
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__raw_writel(BM_ICOLL_INTERRUPTn_ENABLE,
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icoll_base + HW_ICOLL_INTERRUPTn_SET(irq));
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}
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static struct irq_chip mxs_icoll_chip = {
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.ack = icoll_ack_irq,
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.mask = icoll_mask_irq,
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.unmask = icoll_unmask_irq,
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};
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void __init icoll_init_irq(void)
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{
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int i;
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/*
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* Interrupt Collector reset, which initializes the priority
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* for each irq to level 0.
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*/
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mxs_reset_block(icoll_base + HW_ICOLL_CTRL);
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for (i = 0; i < MXS_INTERNAL_IRQS; i++) {
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set_irq_chip(i, &mxs_icoll_chip);
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set_irq_handler(i, handle_level_irq);
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set_irq_flags(i, IRQF_VALID);
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}
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}
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