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Based on 1 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license as published by the free software foundation either version 2 of the license or at your option any later version this program is distributed in the hope that it will be useful but without any warranty without even the implied warranty of merchantability or fitness for a particular purpose see the gnu general public license for more details you should have received a copy of the gnu general public license along with this program if not write to the free software foundation inc 59 temple place suite 330 boston ma 02111 1307 usa extracted by the scancode license scanner the SPDX license identifier GPL-2.0-or-later has been chosen to replace the boilerplate/reference in 1334 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Allison Randal <allison@lohutok.net> Reviewed-by: Richard Fontana <rfontana@redhat.com> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190527070033.113240726@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
190 lines
6.2 KiB
C
190 lines
6.2 KiB
C
/* SPDX-License-Identifier: GPL-2.0-or-later */
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/*
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* Header file for AT91/AT32 LCD Controller
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*
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* Data structure and register user interface
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*
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* Copyright (C) 2007 Atmel Corporation
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*/
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#ifndef __ATMEL_LCDC_H__
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#define __ATMEL_LCDC_H__
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#include <linux/workqueue.h>
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/* Way LCD wires are connected to the chip:
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* Some Atmel chips use BGR color mode (instead of standard RGB)
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* A swapped wiring onboard can bring to RGB mode.
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*/
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#define ATMEL_LCDC_WIRING_BGR 0
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#define ATMEL_LCDC_WIRING_RGB 1
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/* LCD Controller info data structure, stored in device platform_data */
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struct atmel_lcdfb_pdata {
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unsigned int guard_time;
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bool lcdcon_is_backlight;
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bool lcdcon_pol_negative;
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u8 default_bpp;
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u8 lcd_wiring_mode;
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unsigned int default_lcdcon2;
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unsigned int default_dmacon;
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void (*atmel_lcdfb_power_control)(struct atmel_lcdfb_pdata *pdata, int on);
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struct fb_monspecs *default_monspecs;
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struct list_head pwr_gpios;
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};
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#define ATMEL_LCDC_DMABADDR1 0x00
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#define ATMEL_LCDC_DMABADDR2 0x04
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#define ATMEL_LCDC_DMAFRMPT1 0x08
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#define ATMEL_LCDC_DMAFRMPT2 0x0c
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#define ATMEL_LCDC_DMAFRMADD1 0x10
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#define ATMEL_LCDC_DMAFRMADD2 0x14
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#define ATMEL_LCDC_DMAFRMCFG 0x18
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#define ATMEL_LCDC_FRSIZE (0x7fffff << 0)
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#define ATMEL_LCDC_BLENGTH_OFFSET 24
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#define ATMEL_LCDC_BLENGTH (0x7f << ATMEL_LCDC_BLENGTH_OFFSET)
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#define ATMEL_LCDC_DMACON 0x1c
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#define ATMEL_LCDC_DMAEN (0x1 << 0)
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#define ATMEL_LCDC_DMARST (0x1 << 1)
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#define ATMEL_LCDC_DMABUSY (0x1 << 2)
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#define ATMEL_LCDC_DMAUPDT (0x1 << 3)
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#define ATMEL_LCDC_DMA2DEN (0x1 << 4)
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#define ATMEL_LCDC_DMA2DCFG 0x20
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#define ATMEL_LCDC_ADDRINC_OFFSET 0
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#define ATMEL_LCDC_ADDRINC (0xffff)
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#define ATMEL_LCDC_PIXELOFF_OFFSET 24
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#define ATMEL_LCDC_PIXELOFF (0x1f << 24)
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#define ATMEL_LCDC_LCDCON1 0x0800
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#define ATMEL_LCDC_BYPASS (1 << 0)
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#define ATMEL_LCDC_CLKVAL_OFFSET 12
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#define ATMEL_LCDC_CLKVAL (0x1ff << ATMEL_LCDC_CLKVAL_OFFSET)
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#define ATMEL_LCDC_LINCNT (0x7ff << 21)
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#define ATMEL_LCDC_LCDCON2 0x0804
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#define ATMEL_LCDC_DISTYPE (3 << 0)
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#define ATMEL_LCDC_DISTYPE_STNMONO (0 << 0)
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#define ATMEL_LCDC_DISTYPE_STNCOLOR (1 << 0)
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#define ATMEL_LCDC_DISTYPE_TFT (2 << 0)
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#define ATMEL_LCDC_SCANMOD (1 << 2)
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#define ATMEL_LCDC_SCANMOD_SINGLE (0 << 2)
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#define ATMEL_LCDC_SCANMOD_DUAL (1 << 2)
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#define ATMEL_LCDC_IFWIDTH (3 << 3)
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#define ATMEL_LCDC_IFWIDTH_4 (0 << 3)
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#define ATMEL_LCDC_IFWIDTH_8 (1 << 3)
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#define ATMEL_LCDC_IFWIDTH_16 (2 << 3)
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#define ATMEL_LCDC_PIXELSIZE (7 << 5)
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#define ATMEL_LCDC_PIXELSIZE_1 (0 << 5)
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#define ATMEL_LCDC_PIXELSIZE_2 (1 << 5)
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#define ATMEL_LCDC_PIXELSIZE_4 (2 << 5)
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#define ATMEL_LCDC_PIXELSIZE_8 (3 << 5)
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#define ATMEL_LCDC_PIXELSIZE_16 (4 << 5)
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#define ATMEL_LCDC_PIXELSIZE_24 (5 << 5)
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#define ATMEL_LCDC_PIXELSIZE_32 (6 << 5)
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#define ATMEL_LCDC_INVVD (1 << 8)
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#define ATMEL_LCDC_INVVD_NORMAL (0 << 8)
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#define ATMEL_LCDC_INVVD_INVERTED (1 << 8)
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#define ATMEL_LCDC_INVFRAME (1 << 9 )
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#define ATMEL_LCDC_INVFRAME_NORMAL (0 << 9)
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#define ATMEL_LCDC_INVFRAME_INVERTED (1 << 9)
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#define ATMEL_LCDC_INVLINE (1 << 10)
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#define ATMEL_LCDC_INVLINE_NORMAL (0 << 10)
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#define ATMEL_LCDC_INVLINE_INVERTED (1 << 10)
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#define ATMEL_LCDC_INVCLK (1 << 11)
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#define ATMEL_LCDC_INVCLK_NORMAL (0 << 11)
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#define ATMEL_LCDC_INVCLK_INVERTED (1 << 11)
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#define ATMEL_LCDC_INVDVAL (1 << 12)
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#define ATMEL_LCDC_INVDVAL_NORMAL (0 << 12)
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#define ATMEL_LCDC_INVDVAL_INVERTED (1 << 12)
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#define ATMEL_LCDC_CLKMOD (1 << 15)
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#define ATMEL_LCDC_CLKMOD_ACTIVEDISPLAY (0 << 15)
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#define ATMEL_LCDC_CLKMOD_ALWAYSACTIVE (1 << 15)
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#define ATMEL_LCDC_MEMOR (1 << 31)
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#define ATMEL_LCDC_MEMOR_BIG (0 << 31)
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#define ATMEL_LCDC_MEMOR_LITTLE (1 << 31)
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#define ATMEL_LCDC_TIM1 0x0808
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#define ATMEL_LCDC_VFP (0xffU << 0)
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#define ATMEL_LCDC_VBP_OFFSET 8
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#define ATMEL_LCDC_VBP (0xffU << ATMEL_LCDC_VBP_OFFSET)
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#define ATMEL_LCDC_VPW_OFFSET 16
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#define ATMEL_LCDC_VPW (0x3fU << ATMEL_LCDC_VPW_OFFSET)
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#define ATMEL_LCDC_VHDLY_OFFSET 24
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#define ATMEL_LCDC_VHDLY (0xfU << ATMEL_LCDC_VHDLY_OFFSET)
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#define ATMEL_LCDC_TIM2 0x080c
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#define ATMEL_LCDC_HBP (0xffU << 0)
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#define ATMEL_LCDC_HPW_OFFSET 8
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#define ATMEL_LCDC_HPW (0x3fU << ATMEL_LCDC_HPW_OFFSET)
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#define ATMEL_LCDC_HFP_OFFSET 21
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#define ATMEL_LCDC_HFP (0x7ffU << ATMEL_LCDC_HFP_OFFSET)
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#define ATMEL_LCDC_LCDFRMCFG 0x0810
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#define ATMEL_LCDC_LINEVAL (0x7ff << 0)
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#define ATMEL_LCDC_HOZVAL_OFFSET 21
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#define ATMEL_LCDC_HOZVAL (0x7ff << ATMEL_LCDC_HOZVAL_OFFSET)
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#define ATMEL_LCDC_FIFO 0x0814
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#define ATMEL_LCDC_FIFOTH (0xffff)
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#define ATMEL_LCDC_MVAL 0x0818
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#define ATMEL_LCDC_DP1_2 0x081c
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#define ATMEL_LCDC_DP4_7 0x0820
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#define ATMEL_LCDC_DP3_5 0x0824
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#define ATMEL_LCDC_DP2_3 0x0828
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#define ATMEL_LCDC_DP5_7 0x082c
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#define ATMEL_LCDC_DP3_4 0x0830
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#define ATMEL_LCDC_DP4_5 0x0834
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#define ATMEL_LCDC_DP6_7 0x0838
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#define ATMEL_LCDC_DP1_2_VAL (0xff)
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#define ATMEL_LCDC_DP4_7_VAL (0xfffffff)
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#define ATMEL_LCDC_DP3_5_VAL (0xfffff)
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#define ATMEL_LCDC_DP2_3_VAL (0xfff)
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#define ATMEL_LCDC_DP5_7_VAL (0xfffffff)
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#define ATMEL_LCDC_DP3_4_VAL (0xffff)
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#define ATMEL_LCDC_DP4_5_VAL (0xfffff)
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#define ATMEL_LCDC_DP6_7_VAL (0xfffffff)
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#define ATMEL_LCDC_PWRCON 0x083c
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#define ATMEL_LCDC_PWR (1 << 0)
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#define ATMEL_LCDC_GUARDT_OFFSET 1
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#define ATMEL_LCDC_GUARDT (0x7f << ATMEL_LCDC_GUARDT_OFFSET)
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#define ATMEL_LCDC_BUSY (1 << 31)
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#define ATMEL_LCDC_CONTRAST_CTR 0x0840
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#define ATMEL_LCDC_PS (3 << 0)
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#define ATMEL_LCDC_PS_DIV1 (0 << 0)
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#define ATMEL_LCDC_PS_DIV2 (1 << 0)
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#define ATMEL_LCDC_PS_DIV4 (2 << 0)
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#define ATMEL_LCDC_PS_DIV8 (3 << 0)
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#define ATMEL_LCDC_POL (1 << 2)
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#define ATMEL_LCDC_POL_NEGATIVE (0 << 2)
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#define ATMEL_LCDC_POL_POSITIVE (1 << 2)
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#define ATMEL_LCDC_ENA (1 << 3)
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#define ATMEL_LCDC_ENA_PWMDISABLE (0 << 3)
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#define ATMEL_LCDC_ENA_PWMENABLE (1 << 3)
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#define ATMEL_LCDC_CONTRAST_VAL 0x0844
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#define ATMEL_LCDC_CVAL (0xff)
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#define ATMEL_LCDC_IER 0x0848
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#define ATMEL_LCDC_IDR 0x084c
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#define ATMEL_LCDC_IMR 0x0850
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#define ATMEL_LCDC_ISR 0x0854
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#define ATMEL_LCDC_ICR 0x0858
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#define ATMEL_LCDC_LNI (1 << 0)
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#define ATMEL_LCDC_LSTLNI (1 << 1)
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#define ATMEL_LCDC_EOFI (1 << 2)
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#define ATMEL_LCDC_UFLWI (1 << 4)
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#define ATMEL_LCDC_OWRI (1 << 5)
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#define ATMEL_LCDC_MERI (1 << 6)
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#define ATMEL_LCDC_LUT(n) (0x0c00 + ((n)*4))
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#endif /* __ATMEL_LCDC_H__ */
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