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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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f2654a4781
To clear Speed Selection in MDIO control register(0x10),
ie, clear bits 6 and 13 to zero while keeping other bits same.
Before AND operation,The Mask value has to be perform with bitwise NOT
operation (ie, ~ operator)
This patch clears current speed selection before writing the
new speed settings to gmii2rgmii converter
Fixes: f411a6160b ("net: phy: Add gmiitorgmii converter support")
Signed-off-by: Fahad Kunnathadi <fahad.kunnathadi@dexceldesigns.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: David S. Miller <davem@davemloft.net>
113 lines
3.0 KiB
C
113 lines
3.0 KiB
C
/* Xilinx GMII2RGMII Converter driver
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*
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* Copyright (C) 2016 Xilinx, Inc.
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* Copyright (C) 2016 Andrew Lunn <andrew@lunn.ch>
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*
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* Author: Andrew Lunn <andrew@lunn.ch>
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* Author: Kedareswara rao Appana <appanad@xilinx.com>
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*
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* Description:
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* This driver is developed for Xilinx GMII2RGMII Converter
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*
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* This program is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation, either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <linux/module.h>
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#include <linux/kernel.h>
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#include <linux/mii.h>
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#include <linux/mdio.h>
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#include <linux/phy.h>
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#include <linux/of_mdio.h>
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#define XILINX_GMII2RGMII_REG 0x10
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#define XILINX_GMII2RGMII_SPEED_MASK (BMCR_SPEED1000 | BMCR_SPEED100)
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struct gmii2rgmii {
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struct phy_device *phy_dev;
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struct phy_driver *phy_drv;
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struct phy_driver conv_phy_drv;
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int addr;
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};
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static int xgmiitorgmii_read_status(struct phy_device *phydev)
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{
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struct gmii2rgmii *priv = phydev->priv;
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u16 val = 0;
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priv->phy_drv->read_status(phydev);
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val = mdiobus_read(phydev->mdio.bus, priv->addr, XILINX_GMII2RGMII_REG);
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val &= ~XILINX_GMII2RGMII_SPEED_MASK;
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if (phydev->speed == SPEED_1000)
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val |= BMCR_SPEED1000;
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else if (phydev->speed == SPEED_100)
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val |= BMCR_SPEED100;
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else
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val |= BMCR_SPEED10;
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mdiobus_write(phydev->mdio.bus, priv->addr, XILINX_GMII2RGMII_REG, val);
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return 0;
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}
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static int xgmiitorgmii_probe(struct mdio_device *mdiodev)
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{
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struct device *dev = &mdiodev->dev;
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struct device_node *np = dev->of_node, *phy_node;
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struct gmii2rgmii *priv;
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priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
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if (!priv)
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return -ENOMEM;
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phy_node = of_parse_phandle(np, "phy-handle", 0);
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if (!phy_node) {
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dev_err(dev, "Couldn't parse phy-handle\n");
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return -ENODEV;
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}
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priv->phy_dev = of_phy_find_device(phy_node);
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of_node_put(phy_node);
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if (!priv->phy_dev) {
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dev_info(dev, "Couldn't find phydev\n");
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return -EPROBE_DEFER;
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}
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priv->addr = mdiodev->addr;
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priv->phy_drv = priv->phy_dev->drv;
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memcpy(&priv->conv_phy_drv, priv->phy_dev->drv,
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sizeof(struct phy_driver));
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priv->conv_phy_drv.read_status = xgmiitorgmii_read_status;
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priv->phy_dev->priv = priv;
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priv->phy_dev->drv = &priv->conv_phy_drv;
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return 0;
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}
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static const struct of_device_id xgmiitorgmii_of_match[] = {
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{ .compatible = "xlnx,gmii-to-rgmii-1.0" },
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{},
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};
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MODULE_DEVICE_TABLE(of, xgmiitorgmii_of_match);
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static struct mdio_driver xgmiitorgmii_driver = {
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.probe = xgmiitorgmii_probe,
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.mdiodrv.driver = {
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.name = "xgmiitorgmii",
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.of_match_table = xgmiitorgmii_of_match,
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},
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};
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mdio_module_driver(xgmiitorgmii_driver);
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MODULE_DESCRIPTION("Xilinx GMII2RGMII converter driver");
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MODULE_LICENSE("GPL");
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