mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-25 13:52:22 +07:00
0a2ce62b61
This patch fixes an issue that the usbhsf_fifo_clear() is possible
to cause 10 msec delay if the pipe is RX direction and empty because
the FRDY bit will never be set to 1 in such case.
Fixes:
|
||
---|---|---|
.. | ||
common.c | ||
common.h | ||
fifo.c | ||
fifo.h | ||
Kconfig | ||
Makefile | ||
mod_gadget.c | ||
mod_host.c | ||
mod.c | ||
mod.h | ||
pipe.c | ||
pipe.h | ||
rcar2.c | ||
rcar2.h | ||
rcar3.c | ||
rcar3.h |