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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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e2960317d4
When we come to emulating Thumb instructions then, to interwork correctly, the code on in the instruction slot must be invoked with a function pointer which has the least significant bit set. Rather that set this by hand in every Thumb emulation function we will add a new field for this purpose to arch_specific_insn, called insn_fn. This also enables us to seamlessly share emulation functions between ARM and Thumb code. Signed-off-by: Jon Medhurst <tixy@yxit.co.uk> Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>
657 lines
18 KiB
C
657 lines
18 KiB
C
/*
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* arch/arm/kernel/kprobes.c
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*
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* Kprobes on ARM
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*
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* Abhishek Sagar <sagar.abhishek@gmail.com>
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* Copyright (C) 2006, 2007 Motorola Inc.
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*
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* Nicolas Pitre <nico@marvell.com>
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* Copyright (C) 2007 Marvell Ltd.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* General Public License for more details.
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*/
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#include <linux/kernel.h>
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#include <linux/kprobes.h>
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#include <linux/module.h>
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#include <linux/slab.h>
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#include <linux/stop_machine.h>
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#include <linux/stringify.h>
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#include <asm/traps.h>
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#include <asm/cacheflush.h>
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#include "kprobes.h"
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#define MIN_STACK_SIZE(addr) \
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min((unsigned long)MAX_STACK_SIZE, \
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(unsigned long)current_thread_info() + THREAD_START_SP - (addr))
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#define flush_insns(addr, size) \
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flush_icache_range((unsigned long)(addr), \
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(unsigned long)(addr) + \
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(size))
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/* Used as a marker in ARM_pc to note when we're in a jprobe. */
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#define JPROBE_MAGIC_ADDR 0xffffffff
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DEFINE_PER_CPU(struct kprobe *, current_kprobe) = NULL;
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DEFINE_PER_CPU(struct kprobe_ctlblk, kprobe_ctlblk);
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int __kprobes arch_prepare_kprobe(struct kprobe *p)
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{
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kprobe_opcode_t insn;
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kprobe_opcode_t tmp_insn[MAX_INSN_SIZE];
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unsigned long addr = (unsigned long)p->addr;
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bool thumb;
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kprobe_decode_insn_t *decode_insn;
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int is;
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if (in_exception_text(addr))
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return -EINVAL;
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#ifdef CONFIG_THUMB2_KERNEL
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thumb = true;
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addr &= ~1; /* Bit 0 would normally be set to indicate Thumb code */
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insn = ((u16 *)addr)[0];
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if (is_wide_instruction(insn)) {
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insn <<= 16;
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insn |= ((u16 *)addr)[1];
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decode_insn = thumb32_kprobe_decode_insn;
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} else
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decode_insn = thumb16_kprobe_decode_insn;
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#else /* !CONFIG_THUMB2_KERNEL */
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thumb = false;
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if (addr & 0x3)
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return -EINVAL;
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insn = *p->addr;
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decode_insn = arm_kprobe_decode_insn;
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#endif
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p->opcode = insn;
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p->ainsn.insn = tmp_insn;
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switch ((*decode_insn)(insn, &p->ainsn)) {
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case INSN_REJECTED: /* not supported */
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return -EINVAL;
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case INSN_GOOD: /* instruction uses slot */
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p->ainsn.insn = get_insn_slot();
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if (!p->ainsn.insn)
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return -ENOMEM;
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for (is = 0; is < MAX_INSN_SIZE; ++is)
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p->ainsn.insn[is] = tmp_insn[is];
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flush_insns(p->ainsn.insn,
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sizeof(p->ainsn.insn[0]) * MAX_INSN_SIZE);
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p->ainsn.insn_fn = (kprobe_insn_fn_t *)
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((uintptr_t)p->ainsn.insn | thumb);
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break;
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case INSN_GOOD_NO_SLOT: /* instruction doesn't need insn slot */
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p->ainsn.insn = NULL;
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break;
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}
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return 0;
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}
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#ifdef CONFIG_THUMB2_KERNEL
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/*
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* For a 32-bit Thumb breakpoint spanning two memory words we need to take
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* special precautions to insert the breakpoint atomically, especially on SMP
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* systems. This is achieved by calling this arming function using stop_machine.
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*/
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static int __kprobes set_t32_breakpoint(void *addr)
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{
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((u16 *)addr)[0] = KPROBE_THUMB32_BREAKPOINT_INSTRUCTION >> 16;
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((u16 *)addr)[1] = KPROBE_THUMB32_BREAKPOINT_INSTRUCTION & 0xffff;
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flush_insns(addr, 2*sizeof(u16));
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return 0;
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}
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void __kprobes arch_arm_kprobe(struct kprobe *p)
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{
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uintptr_t addr = (uintptr_t)p->addr & ~1; /* Remove any Thumb flag */
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if (!is_wide_instruction(p->opcode)) {
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*(u16 *)addr = KPROBE_THUMB16_BREAKPOINT_INSTRUCTION;
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flush_insns(addr, sizeof(u16));
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} else if (addr & 2) {
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/* A 32-bit instruction spanning two words needs special care */
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stop_machine(set_t32_breakpoint, (void *)addr, &cpu_online_map);
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} else {
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/* Word aligned 32-bit instruction can be written atomically */
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u32 bkp = KPROBE_THUMB32_BREAKPOINT_INSTRUCTION;
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#ifndef __ARMEB__ /* Swap halfwords for little-endian */
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bkp = (bkp >> 16) | (bkp << 16);
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#endif
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*(u32 *)addr = bkp;
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flush_insns(addr, sizeof(u32));
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}
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}
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#else /* !CONFIG_THUMB2_KERNEL */
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void __kprobes arch_arm_kprobe(struct kprobe *p)
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{
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kprobe_opcode_t insn = p->opcode;
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kprobe_opcode_t brkp = KPROBE_ARM_BREAKPOINT_INSTRUCTION;
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if (insn >= 0xe0000000)
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brkp |= 0xe0000000; /* Unconditional instruction */
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else
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brkp |= insn & 0xf0000000; /* Copy condition from insn */
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*p->addr = brkp;
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flush_insns(p->addr, sizeof(p->addr[0]));
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}
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#endif /* !CONFIG_THUMB2_KERNEL */
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/*
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* The actual disarming is done here on each CPU and synchronized using
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* stop_machine. This synchronization is necessary on SMP to avoid removing
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* a probe between the moment the 'Undefined Instruction' exception is raised
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* and the moment the exception handler reads the faulting instruction from
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* memory. It is also needed to atomically set the two half-words of a 32-bit
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* Thumb breakpoint.
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*/
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int __kprobes __arch_disarm_kprobe(void *p)
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{
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struct kprobe *kp = p;
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#ifdef CONFIG_THUMB2_KERNEL
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u16 *addr = (u16 *)((uintptr_t)kp->addr & ~1);
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kprobe_opcode_t insn = kp->opcode;
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unsigned int len;
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if (is_wide_instruction(insn)) {
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((u16 *)addr)[0] = insn>>16;
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((u16 *)addr)[1] = insn;
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len = 2*sizeof(u16);
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} else {
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((u16 *)addr)[0] = insn;
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len = sizeof(u16);
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}
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flush_insns(addr, len);
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#else /* !CONFIG_THUMB2_KERNEL */
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*kp->addr = kp->opcode;
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flush_insns(kp->addr, sizeof(kp->addr[0]));
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#endif
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return 0;
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}
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void __kprobes arch_disarm_kprobe(struct kprobe *p)
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{
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stop_machine(__arch_disarm_kprobe, p, &cpu_online_map);
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}
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void __kprobes arch_remove_kprobe(struct kprobe *p)
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{
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if (p->ainsn.insn) {
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free_insn_slot(p->ainsn.insn, 0);
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p->ainsn.insn = NULL;
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}
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}
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static void __kprobes save_previous_kprobe(struct kprobe_ctlblk *kcb)
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{
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kcb->prev_kprobe.kp = kprobe_running();
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kcb->prev_kprobe.status = kcb->kprobe_status;
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}
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static void __kprobes restore_previous_kprobe(struct kprobe_ctlblk *kcb)
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{
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__get_cpu_var(current_kprobe) = kcb->prev_kprobe.kp;
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kcb->kprobe_status = kcb->prev_kprobe.status;
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}
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static void __kprobes set_current_kprobe(struct kprobe *p)
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{
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__get_cpu_var(current_kprobe) = p;
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}
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static void __kprobes
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singlestep_skip(struct kprobe *p, struct pt_regs *regs)
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{
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#ifdef CONFIG_THUMB2_KERNEL
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regs->ARM_cpsr = it_advance(regs->ARM_cpsr);
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if (is_wide_instruction(p->opcode))
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regs->ARM_pc += 4;
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else
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regs->ARM_pc += 2;
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#else
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regs->ARM_pc += 4;
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#endif
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}
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static inline void __kprobes
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singlestep(struct kprobe *p, struct pt_regs *regs, struct kprobe_ctlblk *kcb)
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{
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p->ainsn.insn_singlestep(p, regs);
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}
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/*
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* Called with IRQs disabled. IRQs must remain disabled from that point
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* all the way until processing this kprobe is complete. The current
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* kprobes implementation cannot process more than one nested level of
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* kprobe, and that level is reserved for user kprobe handlers, so we can't
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* risk encountering a new kprobe in an interrupt handler.
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*/
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void __kprobes kprobe_handler(struct pt_regs *regs)
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{
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struct kprobe *p, *cur;
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struct kprobe_ctlblk *kcb;
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kcb = get_kprobe_ctlblk();
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cur = kprobe_running();
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#ifdef CONFIG_THUMB2_KERNEL
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/*
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* First look for a probe which was registered using an address with
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* bit 0 set, this is the usual situation for pointers to Thumb code.
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* If not found, fallback to looking for one with bit 0 clear.
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*/
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p = get_kprobe((kprobe_opcode_t *)(regs->ARM_pc | 1));
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if (!p)
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p = get_kprobe((kprobe_opcode_t *)regs->ARM_pc);
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#else /* ! CONFIG_THUMB2_KERNEL */
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p = get_kprobe((kprobe_opcode_t *)regs->ARM_pc);
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#endif
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if (p) {
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if (cur) {
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/* Kprobe is pending, so we're recursing. */
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switch (kcb->kprobe_status) {
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case KPROBE_HIT_ACTIVE:
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case KPROBE_HIT_SSDONE:
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/* A pre- or post-handler probe got us here. */
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kprobes_inc_nmissed_count(p);
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save_previous_kprobe(kcb);
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set_current_kprobe(p);
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kcb->kprobe_status = KPROBE_REENTER;
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singlestep(p, regs, kcb);
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restore_previous_kprobe(kcb);
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break;
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default:
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/* impossible cases */
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BUG();
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}
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} else if (p->ainsn.insn_check_cc(regs->ARM_cpsr)) {
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/* Probe hit and conditional execution check ok. */
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set_current_kprobe(p);
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kcb->kprobe_status = KPROBE_HIT_ACTIVE;
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/*
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* If we have no pre-handler or it returned 0, we
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* continue with normal processing. If we have a
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* pre-handler and it returned non-zero, it prepped
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* for calling the break_handler below on re-entry,
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* so get out doing nothing more here.
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*/
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if (!p->pre_handler || !p->pre_handler(p, regs)) {
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kcb->kprobe_status = KPROBE_HIT_SS;
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singlestep(p, regs, kcb);
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if (p->post_handler) {
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kcb->kprobe_status = KPROBE_HIT_SSDONE;
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p->post_handler(p, regs, 0);
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}
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reset_current_kprobe();
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}
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} else {
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/*
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* Probe hit but conditional execution check failed,
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* so just skip the instruction and continue as if
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* nothing had happened.
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*/
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singlestep_skip(p, regs);
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}
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} else if (cur) {
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/* We probably hit a jprobe. Call its break handler. */
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if (cur->break_handler && cur->break_handler(cur, regs)) {
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kcb->kprobe_status = KPROBE_HIT_SS;
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singlestep(cur, regs, kcb);
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if (cur->post_handler) {
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kcb->kprobe_status = KPROBE_HIT_SSDONE;
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cur->post_handler(cur, regs, 0);
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}
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}
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reset_current_kprobe();
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} else {
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/*
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* The probe was removed and a race is in progress.
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* There is nothing we can do about it. Let's restart
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* the instruction. By the time we can restart, the
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* real instruction will be there.
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*/
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}
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}
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static int __kprobes kprobe_trap_handler(struct pt_regs *regs, unsigned int instr)
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{
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unsigned long flags;
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local_irq_save(flags);
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kprobe_handler(regs);
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local_irq_restore(flags);
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return 0;
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}
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int __kprobes kprobe_fault_handler(struct pt_regs *regs, unsigned int fsr)
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{
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struct kprobe *cur = kprobe_running();
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struct kprobe_ctlblk *kcb = get_kprobe_ctlblk();
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switch (kcb->kprobe_status) {
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case KPROBE_HIT_SS:
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case KPROBE_REENTER:
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/*
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* We are here because the instruction being single
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* stepped caused a page fault. We reset the current
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* kprobe and the PC to point back to the probe address
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* and allow the page fault handler to continue as a
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* normal page fault.
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*/
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regs->ARM_pc = (long)cur->addr;
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if (kcb->kprobe_status == KPROBE_REENTER) {
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restore_previous_kprobe(kcb);
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} else {
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reset_current_kprobe();
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}
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break;
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case KPROBE_HIT_ACTIVE:
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case KPROBE_HIT_SSDONE:
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/*
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* We increment the nmissed count for accounting,
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* we can also use npre/npostfault count for accounting
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* these specific fault cases.
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*/
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kprobes_inc_nmissed_count(cur);
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/*
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* We come here because instructions in the pre/post
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* handler caused the page_fault, this could happen
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* if handler tries to access user space by
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* copy_from_user(), get_user() etc. Let the
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* user-specified handler try to fix it.
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*/
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if (cur->fault_handler && cur->fault_handler(cur, regs, fsr))
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return 1;
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break;
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default:
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break;
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}
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return 0;
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}
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int __kprobes kprobe_exceptions_notify(struct notifier_block *self,
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unsigned long val, void *data)
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{
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/*
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* notify_die() is currently never called on ARM,
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* so this callback is currently empty.
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*/
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return NOTIFY_DONE;
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}
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/*
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* When a retprobed function returns, trampoline_handler() is called,
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* calling the kretprobe's handler. We construct a struct pt_regs to
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* give a view of registers r0-r11 to the user return-handler. This is
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* not a complete pt_regs structure, but that should be plenty sufficient
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* for kretprobe handlers which should normally be interested in r0 only
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* anyway.
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*/
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void __naked __kprobes kretprobe_trampoline(void)
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{
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__asm__ __volatile__ (
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"stmdb sp!, {r0 - r11} \n\t"
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"mov r0, sp \n\t"
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"bl trampoline_handler \n\t"
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"mov lr, r0 \n\t"
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"ldmia sp!, {r0 - r11} \n\t"
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#ifdef CONFIG_THUMB2_KERNEL
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"bx lr \n\t"
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#else
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"mov pc, lr \n\t"
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#endif
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: : : "memory");
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}
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/* Called from kretprobe_trampoline */
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static __used __kprobes void *trampoline_handler(struct pt_regs *regs)
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{
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struct kretprobe_instance *ri = NULL;
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struct hlist_head *head, empty_rp;
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struct hlist_node *node, *tmp;
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unsigned long flags, orig_ret_address = 0;
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unsigned long trampoline_address = (unsigned long)&kretprobe_trampoline;
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INIT_HLIST_HEAD(&empty_rp);
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kretprobe_hash_lock(current, &head, &flags);
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/*
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* It is possible to have multiple instances associated with a given
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* task either because multiple functions in the call path have
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* a return probe installed on them, and/or more than one return
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* probe was registered for a target function.
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*
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* We can handle this because:
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* - instances are always inserted at the head of the list
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* - when multiple return probes are registered for the same
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* function, the first instance's ret_addr will point to the
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* real return address, and all the rest will point to
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* kretprobe_trampoline
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*/
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hlist_for_each_entry_safe(ri, node, tmp, head, hlist) {
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if (ri->task != current)
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/* another task is sharing our hash bucket */
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continue;
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if (ri->rp && ri->rp->handler) {
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__get_cpu_var(current_kprobe) = &ri->rp->kp;
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get_kprobe_ctlblk()->kprobe_status = KPROBE_HIT_ACTIVE;
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ri->rp->handler(ri, regs);
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__get_cpu_var(current_kprobe) = NULL;
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}
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orig_ret_address = (unsigned long)ri->ret_addr;
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recycle_rp_inst(ri, &empty_rp);
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if (orig_ret_address != trampoline_address)
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/*
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* This is the real return address. Any other
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* instances associated with this task are for
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* other calls deeper on the call stack
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*/
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break;
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}
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kretprobe_assert(ri, orig_ret_address, trampoline_address);
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kretprobe_hash_unlock(current, &flags);
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hlist_for_each_entry_safe(ri, node, tmp, &empty_rp, hlist) {
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hlist_del(&ri->hlist);
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|
kfree(ri);
|
|
}
|
|
|
|
return (void *)orig_ret_address;
|
|
}
|
|
|
|
void __kprobes arch_prepare_kretprobe(struct kretprobe_instance *ri,
|
|
struct pt_regs *regs)
|
|
{
|
|
ri->ret_addr = (kprobe_opcode_t *)regs->ARM_lr;
|
|
|
|
/* Replace the return addr with trampoline addr. */
|
|
regs->ARM_lr = (unsigned long)&kretprobe_trampoline;
|
|
}
|
|
|
|
int __kprobes setjmp_pre_handler(struct kprobe *p, struct pt_regs *regs)
|
|
{
|
|
struct jprobe *jp = container_of(p, struct jprobe, kp);
|
|
struct kprobe_ctlblk *kcb = get_kprobe_ctlblk();
|
|
long sp_addr = regs->ARM_sp;
|
|
long cpsr;
|
|
|
|
kcb->jprobe_saved_regs = *regs;
|
|
memcpy(kcb->jprobes_stack, (void *)sp_addr, MIN_STACK_SIZE(sp_addr));
|
|
regs->ARM_pc = (long)jp->entry;
|
|
|
|
cpsr = regs->ARM_cpsr | PSR_I_BIT;
|
|
#ifdef CONFIG_THUMB2_KERNEL
|
|
/* Set correct Thumb state in cpsr */
|
|
if (regs->ARM_pc & 1)
|
|
cpsr |= PSR_T_BIT;
|
|
else
|
|
cpsr &= ~PSR_T_BIT;
|
|
#endif
|
|
regs->ARM_cpsr = cpsr;
|
|
|
|
preempt_disable();
|
|
return 1;
|
|
}
|
|
|
|
void __kprobes jprobe_return(void)
|
|
{
|
|
struct kprobe_ctlblk *kcb = get_kprobe_ctlblk();
|
|
|
|
__asm__ __volatile__ (
|
|
/*
|
|
* Setup an empty pt_regs. Fill SP and PC fields as
|
|
* they're needed by longjmp_break_handler.
|
|
*
|
|
* We allocate some slack between the original SP and start of
|
|
* our fabricated regs. To be precise we want to have worst case
|
|
* covered which is STMFD with all 16 regs so we allocate 2 *
|
|
* sizeof(struct_pt_regs)).
|
|
*
|
|
* This is to prevent any simulated instruction from writing
|
|
* over the regs when they are accessing the stack.
|
|
*/
|
|
#ifdef CONFIG_THUMB2_KERNEL
|
|
"sub r0, %0, %1 \n\t"
|
|
"mov sp, r0 \n\t"
|
|
#else
|
|
"sub sp, %0, %1 \n\t"
|
|
#endif
|
|
"ldr r0, ="__stringify(JPROBE_MAGIC_ADDR)"\n\t"
|
|
"str %0, [sp, %2] \n\t"
|
|
"str r0, [sp, %3] \n\t"
|
|
"mov r0, sp \n\t"
|
|
"bl kprobe_handler \n\t"
|
|
|
|
/*
|
|
* Return to the context saved by setjmp_pre_handler
|
|
* and restored by longjmp_break_handler.
|
|
*/
|
|
#ifdef CONFIG_THUMB2_KERNEL
|
|
"ldr lr, [sp, %2] \n\t" /* lr = saved sp */
|
|
"ldrd r0, r1, [sp, %5] \n\t" /* r0,r1 = saved lr,pc */
|
|
"ldr r2, [sp, %4] \n\t" /* r2 = saved psr */
|
|
"stmdb lr!, {r0, r1, r2} \n\t" /* push saved lr and */
|
|
/* rfe context */
|
|
"ldmia sp, {r0 - r12} \n\t"
|
|
"mov sp, lr \n\t"
|
|
"ldr lr, [sp], #4 \n\t"
|
|
"rfeia sp! \n\t"
|
|
#else
|
|
"ldr r0, [sp, %4] \n\t"
|
|
"msr cpsr_cxsf, r0 \n\t"
|
|
"ldmia sp, {r0 - pc} \n\t"
|
|
#endif
|
|
:
|
|
: "r" (kcb->jprobe_saved_regs.ARM_sp),
|
|
"I" (sizeof(struct pt_regs) * 2),
|
|
"J" (offsetof(struct pt_regs, ARM_sp)),
|
|
"J" (offsetof(struct pt_regs, ARM_pc)),
|
|
"J" (offsetof(struct pt_regs, ARM_cpsr)),
|
|
"J" (offsetof(struct pt_regs, ARM_lr))
|
|
: "memory", "cc");
|
|
}
|
|
|
|
int __kprobes longjmp_break_handler(struct kprobe *p, struct pt_regs *regs)
|
|
{
|
|
struct kprobe_ctlblk *kcb = get_kprobe_ctlblk();
|
|
long stack_addr = kcb->jprobe_saved_regs.ARM_sp;
|
|
long orig_sp = regs->ARM_sp;
|
|
struct jprobe *jp = container_of(p, struct jprobe, kp);
|
|
|
|
if (regs->ARM_pc == JPROBE_MAGIC_ADDR) {
|
|
if (orig_sp != stack_addr) {
|
|
struct pt_regs *saved_regs =
|
|
(struct pt_regs *)kcb->jprobe_saved_regs.ARM_sp;
|
|
printk("current sp %lx does not match saved sp %lx\n",
|
|
orig_sp, stack_addr);
|
|
printk("Saved registers for jprobe %p\n", jp);
|
|
show_regs(saved_regs);
|
|
printk("Current registers\n");
|
|
show_regs(regs);
|
|
BUG();
|
|
}
|
|
*regs = kcb->jprobe_saved_regs;
|
|
memcpy((void *)stack_addr, kcb->jprobes_stack,
|
|
MIN_STACK_SIZE(stack_addr));
|
|
preempt_enable_no_resched();
|
|
return 1;
|
|
}
|
|
return 0;
|
|
}
|
|
|
|
int __kprobes arch_trampoline_kprobe(struct kprobe *p)
|
|
{
|
|
return 0;
|
|
}
|
|
|
|
#ifdef CONFIG_THUMB2_KERNEL
|
|
|
|
static struct undef_hook kprobes_thumb16_break_hook = {
|
|
.instr_mask = 0xffff,
|
|
.instr_val = KPROBE_THUMB16_BREAKPOINT_INSTRUCTION,
|
|
.cpsr_mask = MODE_MASK,
|
|
.cpsr_val = SVC_MODE,
|
|
.fn = kprobe_trap_handler,
|
|
};
|
|
|
|
static struct undef_hook kprobes_thumb32_break_hook = {
|
|
.instr_mask = 0xffffffff,
|
|
.instr_val = KPROBE_THUMB32_BREAKPOINT_INSTRUCTION,
|
|
.cpsr_mask = MODE_MASK,
|
|
.cpsr_val = SVC_MODE,
|
|
.fn = kprobe_trap_handler,
|
|
};
|
|
|
|
#else /* !CONFIG_THUMB2_KERNEL */
|
|
|
|
static struct undef_hook kprobes_arm_break_hook = {
|
|
.instr_mask = 0x0fffffff,
|
|
.instr_val = KPROBE_ARM_BREAKPOINT_INSTRUCTION,
|
|
.cpsr_mask = MODE_MASK,
|
|
.cpsr_val = SVC_MODE,
|
|
.fn = kprobe_trap_handler,
|
|
};
|
|
|
|
#endif /* !CONFIG_THUMB2_KERNEL */
|
|
|
|
int __init arch_init_kprobes()
|
|
{
|
|
arm_kprobe_decode_init();
|
|
#ifdef CONFIG_THUMB2_KERNEL
|
|
register_undef_hook(&kprobes_thumb16_break_hook);
|
|
register_undef_hook(&kprobes_thumb32_break_hook);
|
|
#else
|
|
register_undef_hook(&kprobes_arm_break_hook);
|
|
#endif
|
|
return 0;
|
|
}
|