mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-17 23:06:40 +07:00
2a1ccd3142
Pull irq updates from Thomas Gleixner:
"The irq departement provides the usual mixed bag:
Core:
- Further improvements to the irq timings code which aims to predict
the next interrupt for power state selection to achieve better
latency/power balance
- Add interrupt statistics to the core NMI handlers
- The usual small fixes and cleanups
Drivers:
- Support for Renesas RZ/A1, Annapurna Labs FIC, Meson-G12A SoC and
Amazon Gravition AMR/GIC interrupt controllers.
- Rework of the Renesas INTC controller driver
- ACPI support for Socionext SoCs
- Enhancements to the CSKY interrupt controller
- The usual small fixes and cleanups"
* 'irq-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (39 commits)
irq/irqdomain: Fix comment typo
genirq: Update irq stats from NMI handlers
irqchip/gic-pm: Remove PM_CLK dependency
irqchip/al-fic: Introduce Amazon's Annapurna Labs Fabric Interrupt Controller Driver
dt-bindings: interrupt-controller: Add Amazon's Annapurna Labs FIC
softirq: Use __this_cpu_write() in takeover_tasklets()
irqchip/mbigen: Stop printing kernel addresses
irqchip/gic: Add dependency for ARM_GIC_MAX_NR
genirq/affinity: Remove unused argument from [__]irq_build_affinity_masks()
genirq/timings: Add selftest for next event computation
genirq/timings: Add selftest for irqs circular buffer
genirq/timings: Add selftest for circular array
genirq/timings: Encapsulate storing function
genirq/timings: Encapsulate timings push
genirq/timings: Optimize the period detection speed
genirq/timings: Fix timings buffer inspection
genirq/timings: Fix next event index function
irqchip/qcom: Use struct_size() in devm_kzalloc()
irqchip/irq-csky-mpintc: Remove unnecessary loop in interrupt handler
dt-bindings: interrupt-controller: Update csky mpintc
...
45 lines
982 B
C
45 lines
982 B
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* include/linux/irqchip/arm-gic-common.h
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*
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* Copyright (C) 2016 ARM Limited, All Rights Reserved.
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*/
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#ifndef __LINUX_IRQCHIP_ARM_GIC_COMMON_H
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#define __LINUX_IRQCHIP_ARM_GIC_COMMON_H
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#include <linux/types.h>
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#include <linux/ioport.h>
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#define GICD_INT_DEF_PRI 0xa0
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#define GICD_INT_DEF_PRI_X4 ((GICD_INT_DEF_PRI << 24) |\
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(GICD_INT_DEF_PRI << 16) |\
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(GICD_INT_DEF_PRI << 8) |\
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GICD_INT_DEF_PRI)
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enum gic_type {
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GIC_V2,
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GIC_V3,
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};
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struct gic_kvm_info {
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/* GIC type */
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enum gic_type type;
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/* Virtual CPU interface */
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struct resource vcpu;
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/* Interrupt number */
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unsigned int maint_irq;
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/* Virtual control interface */
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struct resource vctrl;
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/* vlpi support */
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bool has_v4;
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};
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const struct gic_kvm_info *gic_get_kvm_info(void);
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struct irq_domain;
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struct fwnode_handle;
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int gicv2m_init(struct fwnode_handle *parent_handle,
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struct irq_domain *parent);
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#endif /* __LINUX_IRQCHIP_ARM_GIC_COMMON_H */
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