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e112018776
Family 8000 products has 2 embedded processors, the first known as LMAC (lower MAC) and implements the functionality from previous products, the second one is known as UMAC (upper MAC) and is used mainly for driver offloads as well as new features. The UMAC is typically “less” real-time than the LMAC and is used for higher level controls. The UMAC's code/data size is estimated to be in the mega-byte arena, taking into account the code it needs to replace in the driver and the set of new features. In order to allow the UMAC to execute code that is bigger than its code memory, we allow the UMAC embedded processor to page out code pages on DRAM. When the device is slave on the bus(SDIO) the driver saves the UMAC's image pages in blocks of 32K in the DRAM and sends the layout of the pages to the FW. When the FW wants load / unload pages, it creates an interrupt, and the driver uploads / downloads the page to an address in the a specific address on the device's memory. The driver can support up to 1 MB of pages. Add paging mechanism for the UMAC on SDIO in order to allow the program to use a larger virtual space while using less physical memory on the device itself. Signed-off-by: Matti Gottlieb <matti.gottlieb@intel.com> Signed-off-by: Emmanuel Grumbach <emmanuel.grumbach@intel.com>
323 lines
10 KiB
C
323 lines
10 KiB
C
/******************************************************************************
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*
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* This file is provided under a dual BSD/GPLv2 license. When using or
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* redistributing this file, you may do so under either license.
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*
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* GPL LICENSE SUMMARY
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*
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* Copyright(c) 2008 - 2014 Intel Corporation. All rights reserved.
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* Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
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* USA
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*
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* The full GNU General Public License is included in this distribution
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* in the file called COPYING.
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*
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* Contact Information:
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* Intel Linux Wireless <ilw@linux.intel.com>
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* Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
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*
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* BSD LICENSE
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*
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* Copyright(c) 2005 - 2014 Intel Corporation. All rights reserved.
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* Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* * Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* * Neither the name Intel Corporation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*****************************************************************************/
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#ifndef __iwl_fw_h__
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#define __iwl_fw_h__
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#include <linux/types.h>
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#include <net/mac80211.h>
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#include "iwl-fw-file.h"
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#include "iwl-fw-error-dump.h"
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/**
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* enum iwl_ucode_type
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*
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* The type of ucode.
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*
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* @IWL_UCODE_REGULAR: Normal runtime ucode
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* @IWL_UCODE_INIT: Initial ucode
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* @IWL_UCODE_WOWLAN: Wake on Wireless enabled ucode
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* @IWL_UCODE_REGULAR_USNIFFER: Normal runtime ucode when using usniffer image
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*/
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enum iwl_ucode_type {
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IWL_UCODE_REGULAR,
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IWL_UCODE_INIT,
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IWL_UCODE_WOWLAN,
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IWL_UCODE_REGULAR_USNIFFER,
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IWL_UCODE_TYPE_MAX,
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};
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/*
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* enumeration of ucode section.
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* This enumeration is used directly for older firmware (before 16.0).
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* For new firmware, there can be up to 4 sections (see below) but the
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* first one packaged into the firmware file is the DATA section and
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* some debugging code accesses that.
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*/
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enum iwl_ucode_sec {
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IWL_UCODE_SECTION_DATA,
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IWL_UCODE_SECTION_INST,
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};
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struct iwl_ucode_capabilities {
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u32 max_probe_length;
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u32 n_scan_channels;
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u32 standard_phy_calibration_size;
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u32 flags;
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unsigned long _api[BITS_TO_LONGS(IWL_API_MAX_BITS)];
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unsigned long _capa[BITS_TO_LONGS(IWL_CAPABILITIES_MAX_BITS)];
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};
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static inline bool
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fw_has_api(const struct iwl_ucode_capabilities *capabilities,
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iwl_ucode_tlv_api_t api)
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{
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return test_bit((__force long)api, capabilities->_api);
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}
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static inline bool
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fw_has_capa(const struct iwl_ucode_capabilities *capabilities,
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iwl_ucode_tlv_capa_t capa)
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{
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return test_bit((__force long)capa, capabilities->_capa);
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}
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/* one for each uCode image (inst/data, init/runtime/wowlan) */
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struct fw_desc {
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const void *data; /* vmalloc'ed data */
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u32 len; /* size in bytes */
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u32 offset; /* offset in the device */
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};
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struct fw_img {
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struct fw_desc sec[IWL_UCODE_SECTION_MAX];
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bool is_dual_cpus;
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u32 paging_mem_size;
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};
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struct iwl_sf_region {
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u32 addr;
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u32 size;
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};
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/*
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* Block paging calculations
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*/
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#define PAGE_2_EXP_SIZE 12 /* 4K == 2^12 */
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#define FW_PAGING_SIZE BIT(PAGE_2_EXP_SIZE) /* page size is 4KB */
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#define PAGE_PER_GROUP_2_EXP_SIZE 3
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/* 8 pages per group */
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#define NUM_OF_PAGE_PER_GROUP BIT(PAGE_PER_GROUP_2_EXP_SIZE)
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/* don't change, support only 32KB size */
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#define PAGING_BLOCK_SIZE (NUM_OF_PAGE_PER_GROUP * FW_PAGING_SIZE)
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/* 32K == 2^15 */
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#define BLOCK_2_EXP_SIZE (PAGE_2_EXP_SIZE + PAGE_PER_GROUP_2_EXP_SIZE)
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/*
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* Image paging calculations
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*/
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#define BLOCK_PER_IMAGE_2_EXP_SIZE 5
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/* 2^5 == 32 blocks per image */
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#define NUM_OF_BLOCK_PER_IMAGE BIT(BLOCK_PER_IMAGE_2_EXP_SIZE)
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/* maximum image size 1024KB */
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#define MAX_PAGING_IMAGE_SIZE (NUM_OF_BLOCK_PER_IMAGE * PAGING_BLOCK_SIZE)
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/* Virtual address signature */
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#define PAGING_ADDR_SIG 0xAA000000
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#define PAGING_CMD_IS_SECURED BIT(9)
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#define PAGING_CMD_IS_ENABLED BIT(8)
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#define PAGING_CMD_NUM_OF_PAGES_IN_LAST_GRP_POS 0
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#define PAGING_TLV_SECURE_MASK 1
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/**
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* struct iwl_fw_paging
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* @fw_paging_phys: page phy pointer
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* @fw_paging_block: pointer to the allocated block
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* @fw_paging_size: page size
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*/
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struct iwl_fw_paging {
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dma_addr_t fw_paging_phys;
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struct page *fw_paging_block;
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u32 fw_paging_size;
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};
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/**
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* struct iwl_fw_cscheme_list - a cipher scheme list
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* @size: a number of entries
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* @cs: cipher scheme entries
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*/
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struct iwl_fw_cscheme_list {
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u8 size;
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struct iwl_fw_cipher_scheme cs[];
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} __packed;
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/**
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* struct iwl_gscan_capabilities - gscan capabilities supported by FW
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* @max_scan_cache_size: total space allocated for scan results (in bytes).
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* @max_scan_buckets: maximum number of channel buckets.
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* @max_ap_cache_per_scan: maximum number of APs that can be stored per scan.
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* @max_rssi_sample_size: number of RSSI samples used for averaging RSSI.
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* @max_scan_reporting_threshold: max possible report threshold. in percentage.
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* @max_hotlist_aps: maximum number of entries for hotlist APs.
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* @max_significant_change_aps: maximum number of entries for significant
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* change APs.
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* @max_bssid_history_entries: number of BSSID/RSSI entries that the device can
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* hold.
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*/
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struct iwl_gscan_capabilities {
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u32 max_scan_cache_size;
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u32 max_scan_buckets;
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u32 max_ap_cache_per_scan;
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u32 max_rssi_sample_size;
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u32 max_scan_reporting_threshold;
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u32 max_hotlist_aps;
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u32 max_significant_change_aps;
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u32 max_bssid_history_entries;
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};
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/**
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* struct iwl_fw - variables associated with the firmware
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*
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* @ucode_ver: ucode version from the ucode file
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* @fw_version: firmware version string
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* @img: ucode image like ucode_rt, ucode_init, ucode_wowlan.
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* @ucode_capa: capabilities parsed from the ucode file.
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* @enhance_sensitivity_table: device can do enhanced sensitivity.
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* @init_evtlog_ptr: event log offset for init ucode.
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* @init_evtlog_size: event log size for init ucode.
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* @init_errlog_ptr: error log offfset for init ucode.
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* @inst_evtlog_ptr: event log offset for runtime ucode.
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* @inst_evtlog_size: event log size for runtime ucode.
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* @inst_errlog_ptr: error log offfset for runtime ucode.
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* @mvm_fw: indicates this is MVM firmware
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* @cipher_scheme: optional external cipher scheme.
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* @human_readable: human readable version
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* @sdio_adma_addr: the default address to set for the ADMA in SDIO mode until
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* we get the ALIVE from the uCode
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* @dbg_dest_tlv: points to the destination TLV for debug
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* @dbg_conf_tlv: array of pointers to configuration TLVs for debug
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* @dbg_conf_tlv_len: lengths of the @dbg_conf_tlv entries
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* @dbg_trigger_tlv: array of pointers to triggers TLVs
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* @dbg_trigger_tlv_len: lengths of the @dbg_trigger_tlv entries
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* @dbg_dest_reg_num: num of reg_ops in %dbg_dest_tlv
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*/
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struct iwl_fw {
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u32 ucode_ver;
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char fw_version[ETHTOOL_FWVERS_LEN];
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/* ucode images */
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struct fw_img img[IWL_UCODE_TYPE_MAX];
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struct iwl_ucode_capabilities ucode_capa;
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bool enhance_sensitivity_table;
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u32 init_evtlog_ptr, init_evtlog_size, init_errlog_ptr;
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u32 inst_evtlog_ptr, inst_evtlog_size, inst_errlog_ptr;
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struct iwl_tlv_calib_ctrl default_calib[IWL_UCODE_TYPE_MAX];
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u32 phy_config;
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u8 valid_tx_ant;
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u8 valid_rx_ant;
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bool mvm_fw;
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struct ieee80211_cipher_scheme cs[IWL_UCODE_MAX_CS];
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u8 human_readable[FW_VER_HUMAN_READABLE_SZ];
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u32 sdio_adma_addr;
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struct iwl_fw_dbg_dest_tlv *dbg_dest_tlv;
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struct iwl_fw_dbg_conf_tlv *dbg_conf_tlv[FW_DBG_CONF_MAX];
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size_t dbg_conf_tlv_len[FW_DBG_CONF_MAX];
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struct iwl_fw_dbg_trigger_tlv *dbg_trigger_tlv[FW_DBG_TRIGGER_MAX];
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size_t dbg_trigger_tlv_len[FW_DBG_TRIGGER_MAX];
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u8 dbg_dest_reg_num;
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struct iwl_gscan_capabilities gscan_capa;
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};
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static inline const char *get_fw_dbg_mode_string(int mode)
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{
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switch (mode) {
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case SMEM_MODE:
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return "SMEM";
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case EXTERNAL_MODE:
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return "EXTERNAL_DRAM";
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case MARBH_MODE:
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return "MARBH";
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case MIPI_MODE:
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return "MIPI";
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default:
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return "UNKNOWN";
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}
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}
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static inline bool
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iwl_fw_dbg_conf_usniffer(const struct iwl_fw *fw, u8 id)
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{
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const struct iwl_fw_dbg_conf_tlv *conf_tlv = fw->dbg_conf_tlv[id];
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if (!conf_tlv)
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return false;
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return conf_tlv->usniffer;
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}
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#define iwl_fw_dbg_trigger_enabled(fw, id) ({ \
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void *__dbg_trigger = (fw)->dbg_trigger_tlv[(id)]; \
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unlikely(__dbg_trigger); \
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})
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static inline struct iwl_fw_dbg_trigger_tlv*
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iwl_fw_dbg_get_trigger(const struct iwl_fw *fw, u8 id)
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{
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if (WARN_ON(id >= ARRAY_SIZE(fw->dbg_trigger_tlv)))
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return NULL;
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return fw->dbg_trigger_tlv[id];
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}
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#endif /* __iwl_fw_h__ */
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