mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-11-24 15:11:00 +07:00
b716e6889c
The host is allowed to pass the controller an sgl describing a buffer that is larger than the dsm payload itself, allow it when executing dsm. Reported-by: Dakshaja Uppalapati <dakshaja@chelsio.com> Reviewed-by: Christoph Hellwig <hch@lst.de>, Reviewed-by: Max Gurtovoy <maxg@mellanox.com> Signed-off-by: Sagi Grimberg <sagi@grimberg.me> Signed-off-by: Keith Busch <kbusch@kernel.org>
351 lines
8.9 KiB
C
351 lines
8.9 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* NVMe I/O command implementation.
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* Copyright (c) 2015-2016 HGST, a Western Digital Company.
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*/
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#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
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#include <linux/blkdev.h>
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#include <linux/module.h>
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#include "nvmet.h"
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void nvmet_bdev_set_limits(struct block_device *bdev, struct nvme_id_ns *id)
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{
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const struct queue_limits *ql = &bdev_get_queue(bdev)->limits;
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/* Number of logical blocks per physical block. */
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const u32 lpp = ql->physical_block_size / ql->logical_block_size;
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/* Logical blocks per physical block, 0's based. */
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const __le16 lpp0b = to0based(lpp);
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/*
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* For NVMe 1.2 and later, bit 1 indicates that the fields NAWUN,
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* NAWUPF, and NACWU are defined for this namespace and should be
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* used by the host for this namespace instead of the AWUN, AWUPF,
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* and ACWU fields in the Identify Controller data structure. If
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* any of these fields are zero that means that the corresponding
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* field from the identify controller data structure should be used.
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*/
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id->nsfeat |= 1 << 1;
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id->nawun = lpp0b;
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id->nawupf = lpp0b;
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id->nacwu = lpp0b;
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/*
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* Bit 4 indicates that the fields NPWG, NPWA, NPDG, NPDA, and
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* NOWS are defined for this namespace and should be used by
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* the host for I/O optimization.
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*/
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id->nsfeat |= 1 << 4;
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/* NPWG = Namespace Preferred Write Granularity. 0's based */
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id->npwg = lpp0b;
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/* NPWA = Namespace Preferred Write Alignment. 0's based */
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id->npwa = id->npwg;
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/* NPDG = Namespace Preferred Deallocate Granularity. 0's based */
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id->npdg = to0based(ql->discard_granularity / ql->logical_block_size);
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/* NPDG = Namespace Preferred Deallocate Alignment */
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id->npda = id->npdg;
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/* NOWS = Namespace Optimal Write Size */
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id->nows = to0based(ql->io_opt / ql->logical_block_size);
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}
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int nvmet_bdev_ns_enable(struct nvmet_ns *ns)
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{
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int ret;
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ns->bdev = blkdev_get_by_path(ns->device_path,
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FMODE_READ | FMODE_WRITE, NULL);
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if (IS_ERR(ns->bdev)) {
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ret = PTR_ERR(ns->bdev);
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if (ret != -ENOTBLK) {
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pr_err("failed to open block device %s: (%ld)\n",
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ns->device_path, PTR_ERR(ns->bdev));
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}
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ns->bdev = NULL;
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return ret;
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}
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ns->size = i_size_read(ns->bdev->bd_inode);
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ns->blksize_shift = blksize_bits(bdev_logical_block_size(ns->bdev));
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return 0;
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}
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void nvmet_bdev_ns_disable(struct nvmet_ns *ns)
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{
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if (ns->bdev) {
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blkdev_put(ns->bdev, FMODE_WRITE | FMODE_READ);
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ns->bdev = NULL;
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}
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}
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static u16 blk_to_nvme_status(struct nvmet_req *req, blk_status_t blk_sts)
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{
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u16 status = NVME_SC_SUCCESS;
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if (likely(blk_sts == BLK_STS_OK))
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return status;
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/*
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* Right now there exists M : 1 mapping between block layer error
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* to the NVMe status code (see nvme_error_status()). For consistency,
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* when we reverse map we use most appropriate NVMe Status code from
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* the group of the NVMe staus codes used in the nvme_error_status().
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*/
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switch (blk_sts) {
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case BLK_STS_NOSPC:
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status = NVME_SC_CAP_EXCEEDED | NVME_SC_DNR;
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req->error_loc = offsetof(struct nvme_rw_command, length);
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break;
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case BLK_STS_TARGET:
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status = NVME_SC_LBA_RANGE | NVME_SC_DNR;
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req->error_loc = offsetof(struct nvme_rw_command, slba);
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break;
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case BLK_STS_NOTSUPP:
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req->error_loc = offsetof(struct nvme_common_command, opcode);
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switch (req->cmd->common.opcode) {
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case nvme_cmd_dsm:
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case nvme_cmd_write_zeroes:
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status = NVME_SC_ONCS_NOT_SUPPORTED | NVME_SC_DNR;
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break;
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default:
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status = NVME_SC_INVALID_OPCODE | NVME_SC_DNR;
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}
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break;
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case BLK_STS_MEDIUM:
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status = NVME_SC_ACCESS_DENIED;
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req->error_loc = offsetof(struct nvme_rw_command, nsid);
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break;
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case BLK_STS_IOERR:
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/* fallthru */
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default:
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status = NVME_SC_INTERNAL | NVME_SC_DNR;
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req->error_loc = offsetof(struct nvme_common_command, opcode);
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}
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switch (req->cmd->common.opcode) {
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case nvme_cmd_read:
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case nvme_cmd_write:
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req->error_slba = le64_to_cpu(req->cmd->rw.slba);
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break;
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case nvme_cmd_write_zeroes:
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req->error_slba =
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le64_to_cpu(req->cmd->write_zeroes.slba);
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break;
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default:
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req->error_slba = 0;
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}
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return status;
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}
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static void nvmet_bio_done(struct bio *bio)
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{
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struct nvmet_req *req = bio->bi_private;
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nvmet_req_complete(req, blk_to_nvme_status(req, bio->bi_status));
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if (bio != &req->b.inline_bio)
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bio_put(bio);
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}
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static void nvmet_bdev_execute_rw(struct nvmet_req *req)
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{
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int sg_cnt = req->sg_cnt;
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struct bio *bio;
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struct scatterlist *sg;
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struct blk_plug plug;
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sector_t sector;
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int op, i;
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if (!nvmet_check_data_len(req, nvmet_rw_len(req)))
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return;
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if (!req->sg_cnt) {
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nvmet_req_complete(req, 0);
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return;
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}
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if (req->cmd->rw.opcode == nvme_cmd_write) {
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op = REQ_OP_WRITE | REQ_SYNC | REQ_IDLE;
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if (req->cmd->rw.control & cpu_to_le16(NVME_RW_FUA))
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op |= REQ_FUA;
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} else {
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op = REQ_OP_READ;
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}
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if (is_pci_p2pdma_page(sg_page(req->sg)))
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op |= REQ_NOMERGE;
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sector = le64_to_cpu(req->cmd->rw.slba);
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sector <<= (req->ns->blksize_shift - 9);
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if (req->transfer_len <= NVMET_MAX_INLINE_DATA_LEN) {
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bio = &req->b.inline_bio;
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bio_init(bio, req->inline_bvec, ARRAY_SIZE(req->inline_bvec));
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} else {
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bio = bio_alloc(GFP_KERNEL, min(sg_cnt, BIO_MAX_PAGES));
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}
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bio_set_dev(bio, req->ns->bdev);
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bio->bi_iter.bi_sector = sector;
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bio->bi_private = req;
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bio->bi_end_io = nvmet_bio_done;
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bio->bi_opf = op;
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blk_start_plug(&plug);
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for_each_sg(req->sg, sg, req->sg_cnt, i) {
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while (bio_add_page(bio, sg_page(sg), sg->length, sg->offset)
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!= sg->length) {
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struct bio *prev = bio;
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bio = bio_alloc(GFP_KERNEL, min(sg_cnt, BIO_MAX_PAGES));
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bio_set_dev(bio, req->ns->bdev);
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bio->bi_iter.bi_sector = sector;
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bio->bi_opf = op;
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bio_chain(bio, prev);
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submit_bio(prev);
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}
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sector += sg->length >> 9;
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sg_cnt--;
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}
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submit_bio(bio);
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blk_finish_plug(&plug);
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}
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static void nvmet_bdev_execute_flush(struct nvmet_req *req)
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{
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struct bio *bio = &req->b.inline_bio;
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if (!nvmet_check_data_len(req, 0))
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return;
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bio_init(bio, req->inline_bvec, ARRAY_SIZE(req->inline_bvec));
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bio_set_dev(bio, req->ns->bdev);
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bio->bi_private = req;
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bio->bi_end_io = nvmet_bio_done;
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bio->bi_opf = REQ_OP_WRITE | REQ_PREFLUSH;
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submit_bio(bio);
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}
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u16 nvmet_bdev_flush(struct nvmet_req *req)
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{
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if (blkdev_issue_flush(req->ns->bdev, GFP_KERNEL, NULL))
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return NVME_SC_INTERNAL | NVME_SC_DNR;
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return 0;
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}
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static u16 nvmet_bdev_discard_range(struct nvmet_req *req,
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struct nvme_dsm_range *range, struct bio **bio)
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{
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struct nvmet_ns *ns = req->ns;
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int ret;
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ret = __blkdev_issue_discard(ns->bdev,
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le64_to_cpu(range->slba) << (ns->blksize_shift - 9),
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le32_to_cpu(range->nlb) << (ns->blksize_shift - 9),
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GFP_KERNEL, 0, bio);
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if (ret && ret != -EOPNOTSUPP) {
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req->error_slba = le64_to_cpu(range->slba);
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return errno_to_nvme_status(req, ret);
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}
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return NVME_SC_SUCCESS;
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}
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static void nvmet_bdev_execute_discard(struct nvmet_req *req)
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{
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struct nvme_dsm_range range;
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struct bio *bio = NULL;
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int i;
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u16 status;
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for (i = 0; i <= le32_to_cpu(req->cmd->dsm.nr); i++) {
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status = nvmet_copy_from_sgl(req, i * sizeof(range), &range,
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sizeof(range));
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if (status)
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break;
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status = nvmet_bdev_discard_range(req, &range, &bio);
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if (status)
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break;
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}
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if (bio) {
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bio->bi_private = req;
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bio->bi_end_io = nvmet_bio_done;
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if (status)
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bio_io_error(bio);
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else
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submit_bio(bio);
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} else {
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nvmet_req_complete(req, status);
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}
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}
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static void nvmet_bdev_execute_dsm(struct nvmet_req *req)
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{
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if (!nvmet_check_data_len_lte(req, nvmet_dsm_len(req)))
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return;
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switch (le32_to_cpu(req->cmd->dsm.attributes)) {
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case NVME_DSMGMT_AD:
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nvmet_bdev_execute_discard(req);
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return;
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case NVME_DSMGMT_IDR:
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case NVME_DSMGMT_IDW:
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default:
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/* Not supported yet */
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nvmet_req_complete(req, 0);
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return;
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}
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}
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static void nvmet_bdev_execute_write_zeroes(struct nvmet_req *req)
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{
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struct nvme_write_zeroes_cmd *write_zeroes = &req->cmd->write_zeroes;
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struct bio *bio = NULL;
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sector_t sector;
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sector_t nr_sector;
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int ret;
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if (!nvmet_check_data_len(req, 0))
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return;
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sector = le64_to_cpu(write_zeroes->slba) <<
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(req->ns->blksize_shift - 9);
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nr_sector = (((sector_t)le16_to_cpu(write_zeroes->length) + 1) <<
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(req->ns->blksize_shift - 9));
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ret = __blkdev_issue_zeroout(req->ns->bdev, sector, nr_sector,
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GFP_KERNEL, &bio, 0);
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if (bio) {
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bio->bi_private = req;
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bio->bi_end_io = nvmet_bio_done;
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submit_bio(bio);
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} else {
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nvmet_req_complete(req, errno_to_nvme_status(req, ret));
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}
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}
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u16 nvmet_bdev_parse_io_cmd(struct nvmet_req *req)
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{
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struct nvme_command *cmd = req->cmd;
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switch (cmd->common.opcode) {
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case nvme_cmd_read:
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case nvme_cmd_write:
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req->execute = nvmet_bdev_execute_rw;
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return 0;
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case nvme_cmd_flush:
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req->execute = nvmet_bdev_execute_flush;
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return 0;
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case nvme_cmd_dsm:
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req->execute = nvmet_bdev_execute_dsm;
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return 0;
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case nvme_cmd_write_zeroes:
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req->execute = nvmet_bdev_execute_write_zeroes;
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return 0;
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default:
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pr_err("unhandled cmd %d on qid %d\n", cmd->common.opcode,
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req->sq->qid);
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req->error_loc = offsetof(struct nvme_common_command, opcode);
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return NVME_SC_INVALID_OPCODE | NVME_SC_DNR;
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}
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}
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