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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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3f5a7896a5
Intel Xeons from Ivy Bridge onwards support a processor identification number set in the factory. To the user this is a handy unique number to identify a particular CPU. Intel can decode this to the fab/production run to track errors. On systems that have it, include it in the machine check record. I'm told that this would be helpful for users that run large data centers with multi-socket servers to keep track of which CPUs are seeing errors. Boris: * Add some clarifying comments and spacing. * Mask out [63:2] in the disabled-but-not-locked case * Call the MSR variable "val" for more readability. Signed-off-by: Tony Luck <tony.luck@intel.com> Cc: Ashok Raj <ashok.raj@intel.com> Cc: linux-edac <linux-edac@vger.kernel.org> Cc: x86-ml <x86@kernel.org> Link: http://lkml.kernel.org/r/20161123114855.njguoaygp3qnbkia@pd.tnic Signed-off-by: Borislav Petkov <bp@suse.de> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> |
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| .. | ||
| Makefile | ||
| mce_amd.c | ||
| mce_intel.c | ||
| mce-apei.c | ||
| mce-genpool.c | ||
| mce-inject.c | ||
| mce-internal.h | ||
| mce-severity.c | ||
| mce.c | ||
| p5.c | ||
| therm_throt.c | ||
| threshold.c | ||
| winchip.c | ||