mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-11-27 03:20:56 +07:00
1da177e4c3
Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
162 lines
3.6 KiB
C
162 lines
3.6 KiB
C
/*
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* linux/include/asm-arm/proc-armo/locks.h
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*
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* Copyright (C) 2000 Russell King
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* Fixes for 26 bit machines, (C) 2000 Dave Gilbert
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* Interrupt safe locking assembler.
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*/
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#ifndef __ASM_PROC_LOCKS_H
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#define __ASM_PROC_LOCKS_H
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/* Decrements by 1, fails if value < 0 */
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#define __down_op(ptr,fail) \
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({ \
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__asm__ __volatile__ ( \
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"@ atomic down operation\n" \
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" mov ip, pc\n" \
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" orr lr, ip, #0x08000000\n" \
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" teqp lr, #0\n" \
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" ldr lr, [%0]\n" \
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" and ip, ip, #0x0c000003\n" \
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" subs lr, lr, #1\n" \
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" str lr, [%0]\n" \
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" orrmi ip, ip, #0x80000000 @ set N\n" \
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" teqp ip, #0\n" \
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" movmi ip, %0\n" \
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" blmi " #fail \
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: \
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: "r" (ptr) \
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: "ip", "lr", "cc"); \
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})
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#define __down_op_ret(ptr,fail) \
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({ \
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unsigned int result; \
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__asm__ __volatile__ ( \
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" @ down_op_ret\n" \
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" mov ip, pc\n" \
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" orr lr, ip, #0x08000000\n" \
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" teqp lr, #0\n" \
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" ldr lr, [%1]\n" \
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" and ip, ip, #0x0c000003\n" \
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" subs lr, lr, #1\n" \
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" str lr, [%1]\n" \
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" orrmi ip, ip, #0x80000000 @ set N\n" \
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" teqp ip, #0\n" \
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" movmi ip, %1\n" \
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" movpl ip, #0\n" \
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" blmi " #fail "\n" \
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" mov %0, ip" \
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: "=&r" (result) \
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: "r" (ptr) \
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: "ip", "lr", "cc"); \
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result; \
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})
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#define __up_op(ptr,wake) \
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({ \
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__asm__ __volatile__ ( \
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"@ up_op\n" \
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" mov ip, pc\n" \
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" orr lr, ip, #0x08000000\n" \
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" teqp lr, #0\n" \
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" ldr lr, [%0]\n" \
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" and ip, ip, #0x0c000003\n" \
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" adds lr, lr, #1\n" \
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" str lr, [%0]\n" \
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" orrle ip, ip, #0x80000000 @ set N - should this be mi ??? DAG ! \n" \
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" teqp ip, #0\n" \
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" movmi ip, %0\n" \
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" blmi " #wake \
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: \
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: "r" (ptr) \
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: "ip", "lr", "cc"); \
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})
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/*
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* The value 0x01000000 supports up to 128 processors and
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* lots of processes. BIAS must be chosen such that sub'ing
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* BIAS once per CPU will result in the long remaining
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* negative.
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*/
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#define RW_LOCK_BIAS 0x01000000
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#define RW_LOCK_BIAS_STR "0x01000000"
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/* Decrements by RW_LOCK_BIAS rather than 1, fails if value != 0 */
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#define __down_op_write(ptr,fail) \
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({ \
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__asm__ __volatile__( \
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"@ down_op_write\n" \
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" mov ip, pc\n" \
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" orr lr, ip, #0x08000000\n" \
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" teqp lr, #0\n" \
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" and ip, ip, #0x0c000003\n" \
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\
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" ldr lr, [%0]\n" \
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" subs lr, lr, %1\n" \
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" str lr, [%0]\n" \
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\
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" orreq ip, ip, #0x40000000 @ set Z \n"\
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" teqp ip, #0\n" \
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" movne ip, %0\n" \
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" blne " #fail \
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: \
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: "r" (ptr), "I" (RW_LOCK_BIAS) \
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: "ip", "lr", "cc"); \
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})
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/* Increments by RW_LOCK_BIAS, wakes if value >= 0 */
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#define __up_op_write(ptr,wake) \
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({ \
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__asm__ __volatile__( \
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"@ up_op_read\n" \
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" mov ip, pc\n" \
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" orr lr, ip, #0x08000000\n" \
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" teqp lr, #0\n" \
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\
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" ldr lr, [%0]\n" \
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" and ip, ip, #0x0c000003\n" \
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" adds lr, lr, %1\n" \
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" str lr, [%0]\n" \
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\
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" orrcs ip, ip, #0x20000000 @ set C\n" \
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" teqp ip, #0\n" \
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" movcs ip, %0\n" \
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" blcs " #wake \
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: \
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: "r" (ptr), "I" (RW_LOCK_BIAS) \
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: "ip", "lr", "cc"); \
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})
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#define __down_op_read(ptr,fail) \
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__down_op(ptr, fail)
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#define __up_op_read(ptr,wake) \
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({ \
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__asm__ __volatile__( \
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"@ up_op_read\n" \
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" mov ip, pc\n" \
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" orr lr, ip, #0x08000000\n" \
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" teqp lr, #0\n" \
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\
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" ldr lr, [%0]\n" \
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" and ip, ip, #0x0c000003\n" \
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" adds lr, lr, %1\n" \
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" str lr, [%0]\n" \
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\
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" orreq ip, ip, #0x40000000 @ Set Z \n" \
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" teqp ip, #0\n" \
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" moveq ip, %0\n" \
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" bleq " #wake \
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: \
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: "r" (ptr), "I" (1) \
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: "ip", "lr", "cc"); \
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})
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#endif
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