mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-11-26 01:30:54 +07:00
5636919b5c
Outlining fixes the issue were on certain CPUs such as the R10000 family the delay loop would need an extra cycle if it overlaps a cacheline boundary. The rewrite also fixes build errors with GCC 4.4 which was changed in way incompatible with the kernel's inline assembly. Relying on pure C for computation of the delay value removes the need for explicit. The price we pay is a slight slowdown of the computation - to be fixed on another day. Signed-off-by: Ralf Baechle <ralf@linux-mips.org> |
||
---|---|---|
.. | ||
ashldi3.c | ||
ashrdi3.c | ||
cmpdi2.c | ||
csum_partial.S | ||
delay.c | ||
dump_tlb.c | ||
iomap-pci.c | ||
iomap.c | ||
libgcc.h | ||
lshrdi3.c | ||
Makefile | ||
memcpy-inatomic.S | ||
memcpy.S | ||
memset.S | ||
r3k_dump_tlb.c | ||
strlen_user.S | ||
strncpy_user.S | ||
strnlen_user.S | ||
ucmpdi2.c | ||
uncached.c |