mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-28 01:57:06 +07:00
9b0cb3c808
Now that we have very simple MMU Notifier support for e500 in place, also add the same simple support to book3s. It gets us one step closer to actual fast support. Signed-off-by: Alexander Graf <agraf@suse.de>
348 lines
8.6 KiB
C
348 lines
8.6 KiB
C
/*
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* Copyright (C) 2010 SUSE Linux Products GmbH. All rights reserved.
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*
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* Authors:
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* Alexander Graf <agraf@suse.de>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License, version 2, as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
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*/
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#include <linux/kvm_host.h>
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#include <linux/hash.h>
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#include <linux/slab.h>
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#include <asm/kvm_ppc.h>
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#include <asm/kvm_book3s.h>
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#include <asm/machdep.h>
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#include <asm/mmu_context.h>
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#include <asm/hw_irq.h>
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#include "trace.h"
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#define PTE_SIZE 12
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static struct kmem_cache *hpte_cache;
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static inline u64 kvmppc_mmu_hash_pte(u64 eaddr)
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{
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return hash_64(eaddr >> PTE_SIZE, HPTEG_HASH_BITS_PTE);
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}
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static inline u64 kvmppc_mmu_hash_pte_long(u64 eaddr)
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{
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return hash_64((eaddr & 0x0ffff000) >> PTE_SIZE,
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HPTEG_HASH_BITS_PTE_LONG);
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}
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static inline u64 kvmppc_mmu_hash_vpte(u64 vpage)
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{
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return hash_64(vpage & 0xfffffffffULL, HPTEG_HASH_BITS_VPTE);
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}
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static inline u64 kvmppc_mmu_hash_vpte_long(u64 vpage)
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{
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return hash_64((vpage & 0xffffff000ULL) >> 12,
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HPTEG_HASH_BITS_VPTE_LONG);
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}
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void kvmppc_mmu_hpte_cache_map(struct kvm_vcpu *vcpu, struct hpte_cache *pte)
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{
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u64 index;
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struct kvmppc_vcpu_book3s *vcpu3s = to_book3s(vcpu);
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trace_kvm_book3s_mmu_map(pte);
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spin_lock(&vcpu3s->mmu_lock);
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/* Add to ePTE list */
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index = kvmppc_mmu_hash_pte(pte->pte.eaddr);
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hlist_add_head_rcu(&pte->list_pte, &vcpu3s->hpte_hash_pte[index]);
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/* Add to ePTE_long list */
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index = kvmppc_mmu_hash_pte_long(pte->pte.eaddr);
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hlist_add_head_rcu(&pte->list_pte_long,
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&vcpu3s->hpte_hash_pte_long[index]);
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/* Add to vPTE list */
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index = kvmppc_mmu_hash_vpte(pte->pte.vpage);
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hlist_add_head_rcu(&pte->list_vpte, &vcpu3s->hpte_hash_vpte[index]);
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/* Add to vPTE_long list */
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index = kvmppc_mmu_hash_vpte_long(pte->pte.vpage);
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hlist_add_head_rcu(&pte->list_vpte_long,
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&vcpu3s->hpte_hash_vpte_long[index]);
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spin_unlock(&vcpu3s->mmu_lock);
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}
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static void free_pte_rcu(struct rcu_head *head)
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{
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struct hpte_cache *pte = container_of(head, struct hpte_cache, rcu_head);
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kmem_cache_free(hpte_cache, pte);
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}
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static void invalidate_pte(struct kvm_vcpu *vcpu, struct hpte_cache *pte)
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{
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struct kvmppc_vcpu_book3s *vcpu3s = to_book3s(vcpu);
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trace_kvm_book3s_mmu_invalidate(pte);
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/* Different for 32 and 64 bit */
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kvmppc_mmu_invalidate_pte(vcpu, pte);
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spin_lock(&vcpu3s->mmu_lock);
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/* pte already invalidated in between? */
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if (hlist_unhashed(&pte->list_pte)) {
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spin_unlock(&vcpu3s->mmu_lock);
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return;
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}
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hlist_del_init_rcu(&pte->list_pte);
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hlist_del_init_rcu(&pte->list_pte_long);
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hlist_del_init_rcu(&pte->list_vpte);
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hlist_del_init_rcu(&pte->list_vpte_long);
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spin_unlock(&vcpu3s->mmu_lock);
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vcpu3s->hpte_cache_count--;
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call_rcu(&pte->rcu_head, free_pte_rcu);
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}
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static void kvmppc_mmu_pte_flush_all(struct kvm_vcpu *vcpu)
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{
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struct kvmppc_vcpu_book3s *vcpu3s = to_book3s(vcpu);
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struct hpte_cache *pte;
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struct hlist_node *node;
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int i;
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rcu_read_lock();
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for (i = 0; i < HPTEG_HASH_NUM_VPTE_LONG; i++) {
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struct hlist_head *list = &vcpu3s->hpte_hash_vpte_long[i];
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hlist_for_each_entry_rcu(pte, node, list, list_vpte_long)
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invalidate_pte(vcpu, pte);
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}
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rcu_read_unlock();
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}
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static void kvmppc_mmu_pte_flush_page(struct kvm_vcpu *vcpu, ulong guest_ea)
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{
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struct kvmppc_vcpu_book3s *vcpu3s = to_book3s(vcpu);
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struct hlist_head *list;
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struct hlist_node *node;
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struct hpte_cache *pte;
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/* Find the list of entries in the map */
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list = &vcpu3s->hpte_hash_pte[kvmppc_mmu_hash_pte(guest_ea)];
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rcu_read_lock();
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/* Check the list for matching entries and invalidate */
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hlist_for_each_entry_rcu(pte, node, list, list_pte)
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if ((pte->pte.eaddr & ~0xfffUL) == guest_ea)
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invalidate_pte(vcpu, pte);
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rcu_read_unlock();
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}
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static void kvmppc_mmu_pte_flush_long(struct kvm_vcpu *vcpu, ulong guest_ea)
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{
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struct kvmppc_vcpu_book3s *vcpu3s = to_book3s(vcpu);
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struct hlist_head *list;
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struct hlist_node *node;
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struct hpte_cache *pte;
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/* Find the list of entries in the map */
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list = &vcpu3s->hpte_hash_pte_long[
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kvmppc_mmu_hash_pte_long(guest_ea)];
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rcu_read_lock();
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/* Check the list for matching entries and invalidate */
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hlist_for_each_entry_rcu(pte, node, list, list_pte_long)
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if ((pte->pte.eaddr & 0x0ffff000UL) == guest_ea)
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invalidate_pte(vcpu, pte);
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rcu_read_unlock();
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}
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void kvmppc_mmu_pte_flush(struct kvm_vcpu *vcpu, ulong guest_ea, ulong ea_mask)
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{
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trace_kvm_book3s_mmu_flush("", vcpu, guest_ea, ea_mask);
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guest_ea &= ea_mask;
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switch (ea_mask) {
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case ~0xfffUL:
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kvmppc_mmu_pte_flush_page(vcpu, guest_ea);
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break;
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case 0x0ffff000:
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kvmppc_mmu_pte_flush_long(vcpu, guest_ea);
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break;
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case 0:
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/* Doing a complete flush -> start from scratch */
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kvmppc_mmu_pte_flush_all(vcpu);
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break;
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default:
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WARN_ON(1);
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break;
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}
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}
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/* Flush with mask 0xfffffffff */
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static void kvmppc_mmu_pte_vflush_short(struct kvm_vcpu *vcpu, u64 guest_vp)
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{
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struct kvmppc_vcpu_book3s *vcpu3s = to_book3s(vcpu);
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struct hlist_head *list;
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struct hlist_node *node;
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struct hpte_cache *pte;
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u64 vp_mask = 0xfffffffffULL;
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list = &vcpu3s->hpte_hash_vpte[kvmppc_mmu_hash_vpte(guest_vp)];
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rcu_read_lock();
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/* Check the list for matching entries and invalidate */
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hlist_for_each_entry_rcu(pte, node, list, list_vpte)
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if ((pte->pte.vpage & vp_mask) == guest_vp)
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invalidate_pte(vcpu, pte);
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rcu_read_unlock();
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}
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/* Flush with mask 0xffffff000 */
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static void kvmppc_mmu_pte_vflush_long(struct kvm_vcpu *vcpu, u64 guest_vp)
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{
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struct kvmppc_vcpu_book3s *vcpu3s = to_book3s(vcpu);
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struct hlist_head *list;
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struct hlist_node *node;
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struct hpte_cache *pte;
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u64 vp_mask = 0xffffff000ULL;
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list = &vcpu3s->hpte_hash_vpte_long[
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kvmppc_mmu_hash_vpte_long(guest_vp)];
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rcu_read_lock();
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/* Check the list for matching entries and invalidate */
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hlist_for_each_entry_rcu(pte, node, list, list_vpte_long)
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if ((pte->pte.vpage & vp_mask) == guest_vp)
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invalidate_pte(vcpu, pte);
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rcu_read_unlock();
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}
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void kvmppc_mmu_pte_vflush(struct kvm_vcpu *vcpu, u64 guest_vp, u64 vp_mask)
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{
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trace_kvm_book3s_mmu_flush("v", vcpu, guest_vp, vp_mask);
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guest_vp &= vp_mask;
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switch(vp_mask) {
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case 0xfffffffffULL:
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kvmppc_mmu_pte_vflush_short(vcpu, guest_vp);
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break;
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case 0xffffff000ULL:
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kvmppc_mmu_pte_vflush_long(vcpu, guest_vp);
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break;
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default:
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WARN_ON(1);
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return;
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}
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}
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void kvmppc_mmu_pte_pflush(struct kvm_vcpu *vcpu, ulong pa_start, ulong pa_end)
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{
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struct kvmppc_vcpu_book3s *vcpu3s = to_book3s(vcpu);
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struct hlist_node *node;
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struct hpte_cache *pte;
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int i;
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trace_kvm_book3s_mmu_flush("p", vcpu, pa_start, pa_end);
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rcu_read_lock();
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for (i = 0; i < HPTEG_HASH_NUM_VPTE_LONG; i++) {
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struct hlist_head *list = &vcpu3s->hpte_hash_vpte_long[i];
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hlist_for_each_entry_rcu(pte, node, list, list_vpte_long)
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if ((pte->pte.raddr >= pa_start) &&
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(pte->pte.raddr < pa_end))
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invalidate_pte(vcpu, pte);
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}
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rcu_read_unlock();
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}
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struct hpte_cache *kvmppc_mmu_hpte_cache_next(struct kvm_vcpu *vcpu)
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{
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struct kvmppc_vcpu_book3s *vcpu3s = to_book3s(vcpu);
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struct hpte_cache *pte;
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pte = kmem_cache_zalloc(hpte_cache, GFP_KERNEL);
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vcpu3s->hpte_cache_count++;
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if (vcpu3s->hpte_cache_count == HPTEG_CACHE_NUM)
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kvmppc_mmu_pte_flush_all(vcpu);
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return pte;
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}
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void kvmppc_mmu_hpte_destroy(struct kvm_vcpu *vcpu)
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{
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kvmppc_mmu_pte_flush(vcpu, 0, 0);
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}
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static void kvmppc_mmu_hpte_init_hash(struct hlist_head *hash_list, int len)
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{
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int i;
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for (i = 0; i < len; i++)
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INIT_HLIST_HEAD(&hash_list[i]);
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}
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int kvmppc_mmu_hpte_init(struct kvm_vcpu *vcpu)
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{
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struct kvmppc_vcpu_book3s *vcpu3s = to_book3s(vcpu);
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/* init hpte lookup hashes */
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kvmppc_mmu_hpte_init_hash(vcpu3s->hpte_hash_pte,
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ARRAY_SIZE(vcpu3s->hpte_hash_pte));
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kvmppc_mmu_hpte_init_hash(vcpu3s->hpte_hash_pte_long,
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ARRAY_SIZE(vcpu3s->hpte_hash_pte_long));
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kvmppc_mmu_hpte_init_hash(vcpu3s->hpte_hash_vpte,
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ARRAY_SIZE(vcpu3s->hpte_hash_vpte));
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kvmppc_mmu_hpte_init_hash(vcpu3s->hpte_hash_vpte_long,
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ARRAY_SIZE(vcpu3s->hpte_hash_vpte_long));
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spin_lock_init(&vcpu3s->mmu_lock);
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return 0;
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}
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int kvmppc_mmu_hpte_sysinit(void)
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{
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/* init hpte slab cache */
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hpte_cache = kmem_cache_create("kvm-spt", sizeof(struct hpte_cache),
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sizeof(struct hpte_cache), 0, NULL);
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return 0;
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}
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void kvmppc_mmu_hpte_sysexit(void)
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{
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kmem_cache_destroy(hpte_cache);
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}
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