mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-04 07:36:46 +07:00
49148020bc
Merge header files for m68k and m68knommu to the single location:
arch/m68k/include/asm
The majority of this patch was the result of the
script that is included in the changelog below.
The script was originally written by Arnd Bergman and
exten by me to cover a few more files.
When the header files differed the script uses the following:
The original m68k file is named <file>_mm.h [mm for memory manager]
The m68knommu file is named <file>_no.h [no for no memory manager]
The files uses the following include guard:
This include gaurd works as the m68knommu toolchain set
the __uClinux__ symbol - so this should work in userspace too.
Merging the header files for m68k and m68knommu exposes the
(unexpected?) ABI differences thus it is easier to actually
identify these and thus to fix them.
The commit has been build tested with both a m68k and
a m68knommu toolchain - with success.
The commit has also been tested with "make headers_check"
and this patch fixes make headers_check for m68knommu.
The script used:
TARGET=arch/m68k/include/asm
SOURCE=arch/m68knommu/include/asm
INCLUDE="cachectl.h errno.h fcntl.h hwtest.h ioctls.h ipcbuf.h \
linkage.h math-emu.h md.h mman.h movs.h msgbuf.h openprom.h \
oplib.h poll.h posix_types.h resource.h rtc.h sembuf.h shmbuf.h \
shm.h shmparam.h socket.h sockios.h spinlock.h statfs.h stat.h \
termbits.h termios.h tlb.h types.h user.h"
EQUAL="auxvec.h cputime.h device.h emergency-restart.h futex.h \
ioctl.h irq_regs.h kdebug.h local.h mutex.h percpu.h \
sections.h topology.h"
NOMUUFILES="anchor.h bootstd.h coldfire.h commproc.h dbg.h \
elia.h flat.h m5206sim.h m520xsim.h m523xsim.h m5249sim.h \
m5272sim.h m527xsim.h m528xsim.h m5307sim.h m532xsim.h \
m5407sim.h m68360_enet.h m68360.h m68360_pram.h m68360_quicc.h \
m68360_regs.h MC68328.h MC68332.h MC68EZ328.h MC68VZ328.h \
mcfcache.h mcfdma.h mcfmbus.h mcfne.h mcfpci.h mcfpit.h \
mcfsim.h mcfsmc.h mcftimer.h mcfuart.h mcfwdebug.h \
nettel.h quicc_simple.h smp.h"
FILES="atomic.h bitops.h bootinfo.h bug.h bugs.h byteorder.h cache.h \
cacheflush.h checksum.h current.h delay.h div64.h \
dma-mapping.h dma.h elf.h entry.h fb.h fpu.h hardirq.h hw_irq.h io.h \
irq.h kmap_types.h machdep.h mc146818rtc.h mmu.h mmu_context.h \
module.h page.h page_offset.h param.h pci.h pgalloc.h \
pgtable.h processor.h ptrace.h scatterlist.h segment.h \
setup.h sigcontext.h siginfo.h signal.h string.h system.h swab.h \
thread_info.h timex.h tlbflush.h traps.h uaccess.h ucontext.h \
unaligned.h unistd.h"
mergefile() {
BASE=${1%.h}
git mv ${SOURCE}/$1 ${TARGET}/${BASE}_no.h
git mv ${TARGET}/$1 ${TARGET}/${BASE}_mm.h
cat << EOF > ${TARGET}/$1
EOF
git add ${TARGET}/$1
}
set -e
mkdir -p ${TARGET}
git mv include/asm-m68k/* ${TARGET}
rmdir include/asm-m68k
git rm ${SOURCE}/Kbuild
for F in $INCLUDE $EQUAL; do
git rm ${SOURCE}/$F
done
for F in $NOMUUFILES; do
git mv ${SOURCE}/$F ${TARGET}/$F
done
for F in $FILES ; do
mergefile $F
done
rmdir arch/m68knommu/include/asm
rmdir arch/m68knommu/include
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Geert Uytterhoeven <geert@linux-m68k.org>
Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
127 lines
3.9 KiB
C
127 lines
3.9 KiB
C
/****************************************************************************/
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/*
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* mcfsim.h -- ColdFire System Integration Module support.
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*
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* (C) Copyright 1999-2003, Greg Ungerer (gerg@snapgear.com)
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* (C) Copyright 2000, Lineo Inc. (www.lineo.com)
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*/
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/****************************************************************************/
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#ifndef mcfsim_h
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#define mcfsim_h
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/****************************************************************************/
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/*
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* Include 5204, 5206/e, 5235, 5249, 5270/5271, 5272, 5280/5282,
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* 5307 or 5407 specific addresses.
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*/
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#if defined(CONFIG_M5206) || defined(CONFIG_M5206e)
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#include <asm/m5206sim.h>
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#elif defined(CONFIG_M520x)
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#include <asm/m520xsim.h>
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#elif defined(CONFIG_M523x)
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#include <asm/m523xsim.h>
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#elif defined(CONFIG_M5249)
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#include <asm/m5249sim.h>
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#elif defined(CONFIG_M527x)
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#include <asm/m527xsim.h>
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#elif defined(CONFIG_M5272)
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#include <asm/m5272sim.h>
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#elif defined(CONFIG_M528x)
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#include <asm/m528xsim.h>
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#elif defined(CONFIG_M5307)
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#include <asm/m5307sim.h>
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#elif defined(CONFIG_M532x)
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#include <asm/m532xsim.h>
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#elif defined(CONFIG_M5407)
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#include <asm/m5407sim.h>
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#endif
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/*
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* Define the base address of the SIM within the MBAR address space.
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*/
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#define MCFSIM_BASE 0x0 /* Base address of SIM */
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/*
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* Bit definitions for the ICR family of registers.
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*/
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#define MCFSIM_ICR_AUTOVEC 0x80 /* Auto-vectored intr */
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#define MCFSIM_ICR_LEVEL0 0x00 /* Level 0 intr */
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#define MCFSIM_ICR_LEVEL1 0x04 /* Level 1 intr */
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#define MCFSIM_ICR_LEVEL2 0x08 /* Level 2 intr */
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#define MCFSIM_ICR_LEVEL3 0x0c /* Level 3 intr */
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#define MCFSIM_ICR_LEVEL4 0x10 /* Level 4 intr */
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#define MCFSIM_ICR_LEVEL5 0x14 /* Level 5 intr */
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#define MCFSIM_ICR_LEVEL6 0x18 /* Level 6 intr */
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#define MCFSIM_ICR_LEVEL7 0x1c /* Level 7 intr */
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#define MCFSIM_ICR_PRI0 0x00 /* Priority 0 intr */
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#define MCFSIM_ICR_PRI1 0x01 /* Priority 1 intr */
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#define MCFSIM_ICR_PRI2 0x02 /* Priority 2 intr */
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#define MCFSIM_ICR_PRI3 0x03 /* Priority 3 intr */
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/*
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* Bit definitions for the Interrupt Mask register (IMR).
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*/
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#define MCFSIM_IMR_EINT1 0x0002 /* External intr # 1 */
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#define MCFSIM_IMR_EINT2 0x0004 /* External intr # 2 */
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#define MCFSIM_IMR_EINT3 0x0008 /* External intr # 3 */
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#define MCFSIM_IMR_EINT4 0x0010 /* External intr # 4 */
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#define MCFSIM_IMR_EINT5 0x0020 /* External intr # 5 */
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#define MCFSIM_IMR_EINT6 0x0040 /* External intr # 6 */
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#define MCFSIM_IMR_EINT7 0x0080 /* External intr # 7 */
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#define MCFSIM_IMR_SWD 0x0100 /* Software Watchdog intr */
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#define MCFSIM_IMR_TIMER1 0x0200 /* TIMER 1 intr */
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#define MCFSIM_IMR_TIMER2 0x0400 /* TIMER 2 intr */
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#define MCFSIM_IMR_MBUS 0x0800 /* MBUS intr */
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#define MCFSIM_IMR_UART1 0x1000 /* UART 1 intr */
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#define MCFSIM_IMR_UART2 0x2000 /* UART 2 intr */
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#if defined(CONFIG_M5206e)
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#define MCFSIM_IMR_DMA1 0x4000 /* DMA 1 intr */
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#define MCFSIM_IMR_DMA2 0x8000 /* DMA 2 intr */
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#elif defined(CONFIG_M5249) || defined(CONFIG_M5307)
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#define MCFSIM_IMR_DMA0 0x4000 /* DMA 0 intr */
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#define MCFSIM_IMR_DMA1 0x8000 /* DMA 1 intr */
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#define MCFSIM_IMR_DMA2 0x10000 /* DMA 2 intr */
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#define MCFSIM_IMR_DMA3 0x20000 /* DMA 3 intr */
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#endif
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/*
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* Mask for all of the SIM devices. Some parts have more or less
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* SIM devices. This is a catchall for the sandard set.
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*/
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#ifndef MCFSIM_IMR_MASKALL
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#define MCFSIM_IMR_MASKALL 0x3ffe /* All intr sources */
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#endif
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/*
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* PIT interrupt settings, if not found in mXXXXsim.h file.
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*/
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#ifndef ICR_INTRCONF
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#define ICR_INTRCONF 0x2b /* PIT1 level 5, priority 3 */
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#endif
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#ifndef MCFPIT_IMR
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#define MCFPIT_IMR MCFINTC_IMRH
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#endif
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#ifndef MCFPIT_IMR_IBIT
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#define MCFPIT_IMR_IBIT (1 << (MCFINT_PIT1 - 32))
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#endif
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#ifndef __ASSEMBLY__
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/*
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* Definition for the interrupt auto-vectoring support.
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*/
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extern void mcf_autovector(unsigned int vec);
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#endif /* __ASSEMBLY__ */
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/****************************************************************************/
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#endif /* mcfsim_h */
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