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Based on 2 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license version 2 as published by the free software foundation this program is free software you can redistribute it and or modify it under the terms of the gnu general public license version 2 as published by the free software foundation # extracted by the scancode license scanner the SPDX license identifier GPL-2.0-only has been chosen to replace the boilerplate/reference in 4122 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Enrico Weigelt <info@metux.net> Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org> Reviewed-by: Allison Randal <allison@lohutok.net> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190604081206.933168790@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
72 lines
2.3 KiB
C
72 lines
2.3 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* TXx9 SoC AC Link Controller
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*/
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#ifndef __TXX9ACLC_H
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#define __TXX9ACLC_H
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#include <linux/interrupt.h>
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#include <asm/txx9/dmac.h>
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#define ACCTLEN 0x00 /* control enable */
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#define ACCTLDIS 0x04 /* control disable */
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#define ACCTL_ENLINK 0x00000001 /* enable/disable AC-link */
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#define ACCTL_AUDODMA 0x00000100 /* AUDODMA enable/disable */
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#define ACCTL_AUDIDMA 0x00001000 /* AUDIDMA enable/disable */
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#define ACCTL_AUDOEHLT 0x00010000 /* AUDO error halt
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enable/disable */
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#define ACCTL_AUDIEHLT 0x00100000 /* AUDI error halt
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enable/disable */
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#define ACREGACC 0x08 /* codec register access */
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#define ACREGACC_DAT_SHIFT 0 /* data field */
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#define ACREGACC_REG_SHIFT 16 /* address field */
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#define ACREGACC_CODECID_SHIFT 24 /* CODEC ID field */
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#define ACREGACC_READ 0x80000000 /* CODEC read */
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#define ACREGACC_WRITE 0x00000000 /* CODEC write */
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#define ACINTSTS 0x10 /* interrupt status */
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#define ACINTMSTS 0x14 /* interrupt masked status */
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#define ACINTEN 0x18 /* interrupt enable */
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#define ACINTDIS 0x1c /* interrupt disable */
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#define ACINT_CODECRDY(n) (0x00000001 << (n)) /* CODECn ready */
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#define ACINT_REGACCRDY 0x00000010 /* ACREGACC ready */
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#define ACINT_AUDOERR 0x00000100 /* AUDO underrun error */
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#define ACINT_AUDIERR 0x00001000 /* AUDI overrun error */
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#define ACDMASTS 0x80 /* DMA request status */
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#define ACDMA_AUDO 0x00000001 /* AUDODMA pending */
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#define ACDMA_AUDI 0x00000010 /* AUDIDMA pending */
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#define ACAUDODAT 0xa0 /* audio out data */
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#define ACAUDIDAT 0xb0 /* audio in data */
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#define ACREVID 0xfc /* revision ID */
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struct txx9aclc_dmadata {
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struct resource *dma_res;
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struct txx9dmac_slave dma_slave;
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struct dma_chan *dma_chan;
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struct tasklet_struct tasklet;
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spinlock_t dma_lock;
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int stream; /* SNDRV_PCM_STREAM_PLAYBACK or SNDRV_PCM_STREAM_CAPTURE */
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struct snd_pcm_substream *substream;
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unsigned long pos;
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dma_addr_t dma_addr;
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unsigned long buffer_bytes;
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unsigned long period_bytes;
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unsigned long frag_bytes;
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int frags;
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int frag_count;
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int dmacount;
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};
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struct txx9aclc_plat_drvdata {
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void __iomem *base;
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u64 physbase;
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};
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static inline struct txx9aclc_plat_drvdata *txx9aclc_get_plat_drvdata(
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struct snd_soc_dai *dai)
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{
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return dev_get_drvdata(dai->dev);
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}
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#endif /* __TXX9ACLC_H */
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