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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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e73bbf6490
If fpga_region_get_manager() fails in fpga_region_program_fpga(), a reference to the fpga_manager instance previously acquired through fpga_region_get() is retained. Make sure to properly release it in the error case by using a separate jump label which will call fpga_region_put() in before returning. Signed-off-by: Tobias Klauser <tklauser@distanz.ch> Acked-by: Moritz Fischer <mdf@kernel.org> Signed-off-by: Alan Tull <atull@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
613 lines
16 KiB
C
613 lines
16 KiB
C
/*
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* FPGA Region - Device Tree support for FPGA programming under Linux
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*
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* Copyright (C) 2013-2016 Altera Corporation
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <linux/fpga/fpga-bridge.h>
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#include <linux/fpga/fpga-mgr.h>
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#include <linux/idr.h>
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#include <linux/kernel.h>
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#include <linux/list.h>
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#include <linux/module.h>
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#include <linux/of_platform.h>
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#include <linux/slab.h>
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#include <linux/spinlock.h>
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/**
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* struct fpga_region - FPGA Region structure
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* @dev: FPGA Region device
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* @mutex: enforces exclusive reference to region
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* @bridge_list: list of FPGA bridges specified in region
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* @info: fpga image specific information
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*/
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struct fpga_region {
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struct device dev;
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struct mutex mutex; /* for exclusive reference to region */
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struct list_head bridge_list;
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struct fpga_image_info *info;
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};
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#define to_fpga_region(d) container_of(d, struct fpga_region, dev)
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static DEFINE_IDA(fpga_region_ida);
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static struct class *fpga_region_class;
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static const struct of_device_id fpga_region_of_match[] = {
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{ .compatible = "fpga-region", },
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{},
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};
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MODULE_DEVICE_TABLE(of, fpga_region_of_match);
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static int fpga_region_of_node_match(struct device *dev, const void *data)
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{
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return dev->of_node == data;
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}
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/**
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* fpga_region_find - find FPGA region
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* @np: device node of FPGA Region
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* Caller will need to put_device(®ion->dev) when done.
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* Returns FPGA Region struct or NULL
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*/
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static struct fpga_region *fpga_region_find(struct device_node *np)
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{
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struct device *dev;
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dev = class_find_device(fpga_region_class, NULL, np,
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fpga_region_of_node_match);
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if (!dev)
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return NULL;
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return to_fpga_region(dev);
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}
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/**
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* fpga_region_get - get an exclusive reference to a fpga region
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* @region: FPGA Region struct
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*
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* Caller should call fpga_region_put() when done with region.
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*
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* Return fpga_region struct if successful.
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* Return -EBUSY if someone already has a reference to the region.
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* Return -ENODEV if @np is not a FPGA Region.
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*/
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static struct fpga_region *fpga_region_get(struct fpga_region *region)
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{
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struct device *dev = ®ion->dev;
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if (!mutex_trylock(®ion->mutex)) {
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dev_dbg(dev, "%s: FPGA Region already in use\n", __func__);
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return ERR_PTR(-EBUSY);
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}
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get_device(dev);
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of_node_get(dev->of_node);
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if (!try_module_get(dev->parent->driver->owner)) {
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of_node_put(dev->of_node);
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put_device(dev);
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mutex_unlock(®ion->mutex);
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return ERR_PTR(-ENODEV);
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}
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dev_dbg(®ion->dev, "get\n");
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return region;
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}
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/**
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* fpga_region_put - release a reference to a region
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*
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* @region: FPGA region
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*/
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static void fpga_region_put(struct fpga_region *region)
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{
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struct device *dev = ®ion->dev;
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dev_dbg(®ion->dev, "put\n");
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module_put(dev->parent->driver->owner);
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of_node_put(dev->of_node);
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put_device(dev);
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mutex_unlock(®ion->mutex);
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}
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/**
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* fpga_region_get_manager - get exclusive reference for FPGA manager
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* @region: FPGA region
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*
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* Get FPGA Manager from "fpga-mgr" property or from ancestor region.
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*
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* Caller should call fpga_mgr_put() when done with manager.
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*
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* Return: fpga manager struct or IS_ERR() condition containing error code.
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*/
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static struct fpga_manager *fpga_region_get_manager(struct fpga_region *region)
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{
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struct device *dev = ®ion->dev;
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struct device_node *np = dev->of_node;
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struct device_node *mgr_node;
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struct fpga_manager *mgr;
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of_node_get(np);
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while (np) {
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if (of_device_is_compatible(np, "fpga-region")) {
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mgr_node = of_parse_phandle(np, "fpga-mgr", 0);
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if (mgr_node) {
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mgr = of_fpga_mgr_get(mgr_node);
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of_node_put(np);
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return mgr;
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}
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}
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np = of_get_next_parent(np);
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}
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of_node_put(np);
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return ERR_PTR(-EINVAL);
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}
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/**
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* fpga_region_get_bridges - create a list of bridges
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* @region: FPGA region
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* @overlay: device node of the overlay
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*
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* Create a list of bridges including the parent bridge and the bridges
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* specified by "fpga-bridges" property. Note that the
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* fpga_bridges_enable/disable/put functions are all fine with an empty list
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* if that happens.
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*
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* Caller should call fpga_bridges_put(®ion->bridge_list) when
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* done with the bridges.
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*
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* Return 0 for success (even if there are no bridges specified)
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* or -EBUSY if any of the bridges are in use.
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*/
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static int fpga_region_get_bridges(struct fpga_region *region,
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struct device_node *overlay)
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{
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struct device *dev = ®ion->dev;
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struct device_node *region_np = dev->of_node;
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struct device_node *br, *np, *parent_br = NULL;
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int i, ret;
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/* If parent is a bridge, add to list */
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ret = fpga_bridge_get_to_list(region_np->parent, region->info,
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®ion->bridge_list);
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if (ret == -EBUSY)
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return ret;
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if (!ret)
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parent_br = region_np->parent;
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/* If overlay has a list of bridges, use it. */
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if (of_parse_phandle(overlay, "fpga-bridges", 0))
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np = overlay;
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else
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np = region_np;
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for (i = 0; ; i++) {
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br = of_parse_phandle(np, "fpga-bridges", i);
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if (!br)
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break;
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/* If parent bridge is in list, skip it. */
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if (br == parent_br)
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continue;
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/* If node is a bridge, get it and add to list */
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ret = fpga_bridge_get_to_list(br, region->info,
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®ion->bridge_list);
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/* If any of the bridges are in use, give up */
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if (ret == -EBUSY) {
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fpga_bridges_put(®ion->bridge_list);
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return -EBUSY;
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}
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}
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return 0;
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}
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/**
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* fpga_region_program_fpga - program FPGA
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* @region: FPGA region
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* @firmware_name: name of FPGA image firmware file
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* @overlay: device node of the overlay
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* Program an FPGA using information in the device tree.
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* Function assumes that there is a firmware-name property.
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* Return 0 for success or negative error code.
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*/
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static int fpga_region_program_fpga(struct fpga_region *region,
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const char *firmware_name,
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struct device_node *overlay)
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{
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struct fpga_manager *mgr;
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int ret;
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region = fpga_region_get(region);
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if (IS_ERR(region)) {
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pr_err("failed to get fpga region\n");
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return PTR_ERR(region);
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}
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mgr = fpga_region_get_manager(region);
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if (IS_ERR(mgr)) {
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pr_err("failed to get fpga region manager\n");
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ret = PTR_ERR(mgr);
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goto err_put_region;
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}
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ret = fpga_region_get_bridges(region, overlay);
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if (ret) {
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pr_err("failed to get fpga region bridges\n");
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goto err_put_mgr;
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}
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ret = fpga_bridges_disable(®ion->bridge_list);
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if (ret) {
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pr_err("failed to disable region bridges\n");
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goto err_put_br;
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}
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ret = fpga_mgr_firmware_load(mgr, region->info, firmware_name);
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if (ret) {
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pr_err("failed to load fpga image\n");
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goto err_put_br;
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}
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ret = fpga_bridges_enable(®ion->bridge_list);
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if (ret) {
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pr_err("failed to enable region bridges\n");
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goto err_put_br;
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}
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fpga_mgr_put(mgr);
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fpga_region_put(region);
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return 0;
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err_put_br:
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fpga_bridges_put(®ion->bridge_list);
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err_put_mgr:
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fpga_mgr_put(mgr);
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err_put_region:
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fpga_region_put(region);
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return ret;
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}
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/**
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* child_regions_with_firmware
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* @overlay: device node of the overlay
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*
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* If the overlay adds child FPGA regions, they are not allowed to have
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* firmware-name property.
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*
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* Return 0 for OK or -EINVAL if child FPGA region adds firmware-name.
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*/
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static int child_regions_with_firmware(struct device_node *overlay)
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{
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struct device_node *child_region;
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const char *child_firmware_name;
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int ret = 0;
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of_node_get(overlay);
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child_region = of_find_matching_node(overlay, fpga_region_of_match);
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while (child_region) {
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if (!of_property_read_string(child_region, "firmware-name",
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&child_firmware_name)) {
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ret = -EINVAL;
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break;
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}
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child_region = of_find_matching_node(child_region,
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fpga_region_of_match);
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}
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of_node_put(child_region);
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if (ret)
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pr_err("firmware-name not allowed in child FPGA region: %s",
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child_region->full_name);
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return ret;
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}
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/**
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* fpga_region_notify_pre_apply - pre-apply overlay notification
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*
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* @region: FPGA region that the overlay was applied to
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* @nd: overlay notification data
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*
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* Called after when an overlay targeted to a FPGA Region is about to be
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* applied. Function will check the properties that will be added to the FPGA
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* region. If the checks pass, it will program the FPGA.
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*
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* The checks are:
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* The overlay must add either firmware-name or external-fpga-config property
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* to the FPGA Region.
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*
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* firmware-name : program the FPGA
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* external-fpga-config : FPGA is already programmed
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* encrypted-fpga-config : FPGA bitstream is encrypted
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*
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* The overlay can add other FPGA regions, but child FPGA regions cannot have a
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* firmware-name property since those regions don't exist yet.
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*
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* If the overlay that breaks the rules, notifier returns an error and the
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* overlay is rejected before it goes into the main tree.
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*
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* Returns 0 for success or negative error code for failure.
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*/
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static int fpga_region_notify_pre_apply(struct fpga_region *region,
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struct of_overlay_notify_data *nd)
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{
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const char *firmware_name = NULL;
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struct fpga_image_info *info;
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int ret;
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info = devm_kzalloc(®ion->dev, sizeof(*info), GFP_KERNEL);
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if (!info)
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return -ENOMEM;
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region->info = info;
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/* Reject overlay if child FPGA Regions have firmware-name property */
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ret = child_regions_with_firmware(nd->overlay);
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if (ret)
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return ret;
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/* Read FPGA region properties from the overlay */
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if (of_property_read_bool(nd->overlay, "partial-fpga-config"))
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info->flags |= FPGA_MGR_PARTIAL_RECONFIG;
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if (of_property_read_bool(nd->overlay, "external-fpga-config"))
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info->flags |= FPGA_MGR_EXTERNAL_CONFIG;
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if (of_property_read_bool(nd->overlay, "encrypted-fpga-config"))
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info->flags |= FPGA_MGR_ENCRYPTED_BITSTREAM;
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of_property_read_string(nd->overlay, "firmware-name", &firmware_name);
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of_property_read_u32(nd->overlay, "region-unfreeze-timeout-us",
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&info->enable_timeout_us);
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of_property_read_u32(nd->overlay, "region-freeze-timeout-us",
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&info->disable_timeout_us);
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of_property_read_u32(nd->overlay, "config-complete-timeout-us",
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&info->config_complete_timeout_us);
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/* If FPGA was externally programmed, don't specify firmware */
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if ((info->flags & FPGA_MGR_EXTERNAL_CONFIG) && firmware_name) {
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pr_err("error: specified firmware and external-fpga-config");
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return -EINVAL;
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}
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/* FPGA is already configured externally. We're done. */
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if (info->flags & FPGA_MGR_EXTERNAL_CONFIG)
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return 0;
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/* If we got this far, we should be programming the FPGA */
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if (!firmware_name) {
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pr_err("should specify firmware-name or external-fpga-config\n");
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return -EINVAL;
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}
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return fpga_region_program_fpga(region, firmware_name, nd->overlay);
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}
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/**
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* fpga_region_notify_post_remove - post-remove overlay notification
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*
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* @region: FPGA region that was targeted by the overlay that was removed
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* @nd: overlay notification data
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*
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* Called after an overlay has been removed if the overlay's target was a
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* FPGA region.
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*/
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static void fpga_region_notify_post_remove(struct fpga_region *region,
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struct of_overlay_notify_data *nd)
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{
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fpga_bridges_disable(®ion->bridge_list);
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fpga_bridges_put(®ion->bridge_list);
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devm_kfree(®ion->dev, region->info);
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region->info = NULL;
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}
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/**
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* of_fpga_region_notify - reconfig notifier for dynamic DT changes
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* @nb: notifier block
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* @action: notifier action
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* @arg: reconfig data
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*
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* This notifier handles programming a FPGA when a "firmware-name" property is
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* added to a fpga-region.
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*
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* Returns NOTIFY_OK or error if FPGA programming fails.
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*/
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static int of_fpga_region_notify(struct notifier_block *nb,
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unsigned long action, void *arg)
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{
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struct of_overlay_notify_data *nd = arg;
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struct fpga_region *region;
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int ret;
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switch (action) {
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case OF_OVERLAY_PRE_APPLY:
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pr_debug("%s OF_OVERLAY_PRE_APPLY\n", __func__);
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break;
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case OF_OVERLAY_POST_APPLY:
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pr_debug("%s OF_OVERLAY_POST_APPLY\n", __func__);
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return NOTIFY_OK; /* not for us */
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case OF_OVERLAY_PRE_REMOVE:
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pr_debug("%s OF_OVERLAY_PRE_REMOVE\n", __func__);
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return NOTIFY_OK; /* not for us */
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case OF_OVERLAY_POST_REMOVE:
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pr_debug("%s OF_OVERLAY_POST_REMOVE\n", __func__);
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break;
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default: /* should not happen */
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return NOTIFY_OK;
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}
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region = fpga_region_find(nd->target);
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if (!region)
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return NOTIFY_OK;
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ret = 0;
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switch (action) {
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case OF_OVERLAY_PRE_APPLY:
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ret = fpga_region_notify_pre_apply(region, nd);
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break;
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case OF_OVERLAY_POST_REMOVE:
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fpga_region_notify_post_remove(region, nd);
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break;
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}
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put_device(®ion->dev);
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if (ret)
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return notifier_from_errno(ret);
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return NOTIFY_OK;
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}
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static struct notifier_block fpga_region_of_nb = {
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.notifier_call = of_fpga_region_notify,
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};
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static int fpga_region_probe(struct platform_device *pdev)
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{
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struct device *dev = &pdev->dev;
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struct device_node *np = dev->of_node;
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struct fpga_region *region;
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int id, ret = 0;
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region = kzalloc(sizeof(*region), GFP_KERNEL);
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if (!region)
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return -ENOMEM;
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id = ida_simple_get(&fpga_region_ida, 0, 0, GFP_KERNEL);
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if (id < 0) {
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ret = id;
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goto err_kfree;
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}
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mutex_init(®ion->mutex);
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INIT_LIST_HEAD(®ion->bridge_list);
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device_initialize(®ion->dev);
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region->dev.class = fpga_region_class;
|
|
region->dev.parent = dev;
|
|
region->dev.of_node = np;
|
|
region->dev.id = id;
|
|
dev_set_drvdata(dev, region);
|
|
|
|
ret = dev_set_name(®ion->dev, "region%d", id);
|
|
if (ret)
|
|
goto err_remove;
|
|
|
|
ret = device_add(®ion->dev);
|
|
if (ret)
|
|
goto err_remove;
|
|
|
|
of_platform_populate(np, fpga_region_of_match, NULL, ®ion->dev);
|
|
|
|
dev_info(dev, "FPGA Region probed\n");
|
|
|
|
return 0;
|
|
|
|
err_remove:
|
|
ida_simple_remove(&fpga_region_ida, id);
|
|
err_kfree:
|
|
kfree(region);
|
|
|
|
return ret;
|
|
}
|
|
|
|
static int fpga_region_remove(struct platform_device *pdev)
|
|
{
|
|
struct fpga_region *region = platform_get_drvdata(pdev);
|
|
|
|
device_unregister(®ion->dev);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static struct platform_driver fpga_region_driver = {
|
|
.probe = fpga_region_probe,
|
|
.remove = fpga_region_remove,
|
|
.driver = {
|
|
.name = "fpga-region",
|
|
.of_match_table = of_match_ptr(fpga_region_of_match),
|
|
},
|
|
};
|
|
|
|
static void fpga_region_dev_release(struct device *dev)
|
|
{
|
|
struct fpga_region *region = to_fpga_region(dev);
|
|
|
|
ida_simple_remove(&fpga_region_ida, region->dev.id);
|
|
kfree(region);
|
|
}
|
|
|
|
/**
|
|
* fpga_region_init - init function for fpga_region class
|
|
* Creates the fpga_region class and registers a reconfig notifier.
|
|
*/
|
|
static int __init fpga_region_init(void)
|
|
{
|
|
int ret;
|
|
|
|
fpga_region_class = class_create(THIS_MODULE, "fpga_region");
|
|
if (IS_ERR(fpga_region_class))
|
|
return PTR_ERR(fpga_region_class);
|
|
|
|
fpga_region_class->dev_release = fpga_region_dev_release;
|
|
|
|
ret = of_overlay_notifier_register(&fpga_region_of_nb);
|
|
if (ret)
|
|
goto err_class;
|
|
|
|
ret = platform_driver_register(&fpga_region_driver);
|
|
if (ret)
|
|
goto err_plat;
|
|
|
|
return 0;
|
|
|
|
err_plat:
|
|
of_overlay_notifier_unregister(&fpga_region_of_nb);
|
|
err_class:
|
|
class_destroy(fpga_region_class);
|
|
ida_destroy(&fpga_region_ida);
|
|
return ret;
|
|
}
|
|
|
|
static void __exit fpga_region_exit(void)
|
|
{
|
|
platform_driver_unregister(&fpga_region_driver);
|
|
of_overlay_notifier_unregister(&fpga_region_of_nb);
|
|
class_destroy(fpga_region_class);
|
|
ida_destroy(&fpga_region_ida);
|
|
}
|
|
|
|
subsys_initcall(fpga_region_init);
|
|
module_exit(fpga_region_exit);
|
|
|
|
MODULE_DESCRIPTION("FPGA Region");
|
|
MODULE_AUTHOR("Alan Tull <atull@opensource.altera.com>");
|
|
MODULE_LICENSE("GPL v2");
|