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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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f85279b4bd
The SPE buffer is virtually addressed, using the page tables of the CPU MMU. Unusually, this means that the EL0/1 page table may be live whilst we're executing at EL2 on non-VHE configurations. When VHE is in use, we can use the same property to profile the guest behind its back. This patch adds the relevant disabling and flushing code to KVM so that the host can make use of SPE without corrupting guest memory, and any attempts by a guest to use SPE will result in a trap. Acked-by: Marc Zyngier <marc.zyngier@arm.com> Cc: Alex Bennée <alex.bennee@linaro.org> Cc: Christoffer Dall <christoffer.dall@linaro.org> Signed-off-by: Will Deacon <will.deacon@arm.com>
200 lines
5.8 KiB
C
200 lines
5.8 KiB
C
/*
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* Copyright (C) 2015 - ARM Ltd
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* Author: Marc Zyngier <marc.zyngier@arm.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <linux/compiler.h>
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#include <linux/kvm_host.h>
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#include <asm/debug-monitors.h>
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#include <asm/kvm_asm.h>
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#include <asm/kvm_hyp.h>
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#define read_debug(r,n) read_sysreg(r##n##_el1)
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#define write_debug(v,r,n) write_sysreg(v, r##n##_el1)
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#define save_debug(ptr,reg,nr) \
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switch (nr) { \
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case 15: ptr[15] = read_debug(reg, 15); \
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case 14: ptr[14] = read_debug(reg, 14); \
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case 13: ptr[13] = read_debug(reg, 13); \
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case 12: ptr[12] = read_debug(reg, 12); \
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case 11: ptr[11] = read_debug(reg, 11); \
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case 10: ptr[10] = read_debug(reg, 10); \
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case 9: ptr[9] = read_debug(reg, 9); \
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case 8: ptr[8] = read_debug(reg, 8); \
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case 7: ptr[7] = read_debug(reg, 7); \
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case 6: ptr[6] = read_debug(reg, 6); \
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case 5: ptr[5] = read_debug(reg, 5); \
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case 4: ptr[4] = read_debug(reg, 4); \
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case 3: ptr[3] = read_debug(reg, 3); \
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case 2: ptr[2] = read_debug(reg, 2); \
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case 1: ptr[1] = read_debug(reg, 1); \
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default: ptr[0] = read_debug(reg, 0); \
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}
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#define restore_debug(ptr,reg,nr) \
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switch (nr) { \
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case 15: write_debug(ptr[15], reg, 15); \
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case 14: write_debug(ptr[14], reg, 14); \
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case 13: write_debug(ptr[13], reg, 13); \
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case 12: write_debug(ptr[12], reg, 12); \
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case 11: write_debug(ptr[11], reg, 11); \
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case 10: write_debug(ptr[10], reg, 10); \
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case 9: write_debug(ptr[9], reg, 9); \
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case 8: write_debug(ptr[8], reg, 8); \
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case 7: write_debug(ptr[7], reg, 7); \
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case 6: write_debug(ptr[6], reg, 6); \
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case 5: write_debug(ptr[5], reg, 5); \
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case 4: write_debug(ptr[4], reg, 4); \
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case 3: write_debug(ptr[3], reg, 3); \
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case 2: write_debug(ptr[2], reg, 2); \
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case 1: write_debug(ptr[1], reg, 1); \
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default: write_debug(ptr[0], reg, 0); \
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}
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#define PMSCR_EL1 sys_reg(3, 0, 9, 9, 0)
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#define PMBLIMITR_EL1 sys_reg(3, 0, 9, 10, 0)
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#define PMBLIMITR_EL1_E BIT(0)
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#define PMBIDR_EL1 sys_reg(3, 0, 9, 10, 7)
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#define PMBIDR_EL1_P BIT(4)
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#define psb_csync() asm volatile("hint #17")
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static void __hyp_text __debug_save_spe_vhe(u64 *pmscr_el1)
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{
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/* The vcpu can run. but it can't hide. */
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}
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static void __hyp_text __debug_save_spe_nvhe(u64 *pmscr_el1)
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{
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u64 reg;
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/* SPE present on this CPU? */
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if (!cpuid_feature_extract_unsigned_field(read_sysreg(id_aa64dfr0_el1),
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ID_AA64DFR0_PMSVER_SHIFT))
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return;
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/* Yes; is it owned by EL3? */
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reg = read_sysreg_s(PMBIDR_EL1);
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if (reg & PMBIDR_EL1_P)
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return;
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/* No; is the host actually using the thing? */
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reg = read_sysreg_s(PMBLIMITR_EL1);
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if (!(reg & PMBLIMITR_EL1_E))
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return;
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/* Yes; save the control register and disable data generation */
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*pmscr_el1 = read_sysreg_s(PMSCR_EL1);
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write_sysreg_s(0, PMSCR_EL1);
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isb();
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/* Now drain all buffered data to memory */
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psb_csync();
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dsb(nsh);
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}
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static hyp_alternate_select(__debug_save_spe,
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__debug_save_spe_nvhe, __debug_save_spe_vhe,
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ARM64_HAS_VIRT_HOST_EXTN);
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static void __hyp_text __debug_restore_spe(u64 pmscr_el1)
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{
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if (!pmscr_el1)
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return;
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/* The host page table is installed, but not yet synchronised */
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isb();
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/* Re-enable data generation */
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write_sysreg_s(pmscr_el1, PMSCR_EL1);
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}
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void __hyp_text __debug_save_state(struct kvm_vcpu *vcpu,
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struct kvm_guest_debug_arch *dbg,
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struct kvm_cpu_context *ctxt)
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{
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u64 aa64dfr0;
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int brps, wrps;
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if (!(vcpu->arch.debug_flags & KVM_ARM64_DEBUG_DIRTY))
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return;
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aa64dfr0 = read_sysreg(id_aa64dfr0_el1);
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brps = (aa64dfr0 >> 12) & 0xf;
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wrps = (aa64dfr0 >> 20) & 0xf;
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save_debug(dbg->dbg_bcr, dbgbcr, brps);
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save_debug(dbg->dbg_bvr, dbgbvr, brps);
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save_debug(dbg->dbg_wcr, dbgwcr, wrps);
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save_debug(dbg->dbg_wvr, dbgwvr, wrps);
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ctxt->sys_regs[MDCCINT_EL1] = read_sysreg(mdccint_el1);
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}
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void __hyp_text __debug_restore_state(struct kvm_vcpu *vcpu,
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struct kvm_guest_debug_arch *dbg,
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struct kvm_cpu_context *ctxt)
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{
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u64 aa64dfr0;
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int brps, wrps;
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if (!(vcpu->arch.debug_flags & KVM_ARM64_DEBUG_DIRTY))
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return;
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aa64dfr0 = read_sysreg(id_aa64dfr0_el1);
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brps = (aa64dfr0 >> 12) & 0xf;
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wrps = (aa64dfr0 >> 20) & 0xf;
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restore_debug(dbg->dbg_bcr, dbgbcr, brps);
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restore_debug(dbg->dbg_bvr, dbgbvr, brps);
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restore_debug(dbg->dbg_wcr, dbgwcr, wrps);
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restore_debug(dbg->dbg_wvr, dbgwvr, wrps);
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write_sysreg(ctxt->sys_regs[MDCCINT_EL1], mdccint_el1);
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}
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void __hyp_text __debug_cond_save_host_state(struct kvm_vcpu *vcpu)
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{
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/* If any of KDE, MDE or KVM_ARM64_DEBUG_DIRTY is set, perform
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* a full save/restore cycle. */
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if ((vcpu->arch.ctxt.sys_regs[MDSCR_EL1] & DBG_MDSCR_KDE) ||
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(vcpu->arch.ctxt.sys_regs[MDSCR_EL1] & DBG_MDSCR_MDE))
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vcpu->arch.debug_flags |= KVM_ARM64_DEBUG_DIRTY;
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__debug_save_state(vcpu, &vcpu->arch.host_debug_state.regs,
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kern_hyp_va(vcpu->arch.host_cpu_context));
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__debug_save_spe()(&vcpu->arch.host_debug_state.pmscr_el1);
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}
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void __hyp_text __debug_cond_restore_host_state(struct kvm_vcpu *vcpu)
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{
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__debug_restore_spe(vcpu->arch.host_debug_state.pmscr_el1);
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__debug_restore_state(vcpu, &vcpu->arch.host_debug_state.regs,
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kern_hyp_va(vcpu->arch.host_cpu_context));
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if (vcpu->arch.debug_flags & KVM_ARM64_DEBUG_DIRTY)
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vcpu->arch.debug_flags &= ~KVM_ARM64_DEBUG_DIRTY;
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}
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u32 __hyp_text __kvm_get_mdcr_el2(void)
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{
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return read_sysreg(mdcr_el2);
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}
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