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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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550ab390d7
This enables the L2 cache controller available in Amlogic SoCs. Signed-off-by: Beniamino Galvani <b.galvani@gmail.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Carlo Caione <carlo@caione.org>
118 lines
3.5 KiB
Plaintext
118 lines
3.5 KiB
Plaintext
/*
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* Copyright 2014 Carlo Caione <carlo@caione.org>
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*
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* This file is dual-licensed: you can use it either under the terms
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* of the GPL or the X11 license, at your option. Note that this dual
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* licensing only applies to this file, and not this project as a
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* whole.
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*
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* a) This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of the
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* License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public
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* License along with this library; if not, write to the Free
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* Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
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* MA 02110-1301 USA
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*
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* Or, alternatively,
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*
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* b) Permission is hereby granted, free of charge, to any person
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* obtaining a copy of this software and associated documentation
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* files (the "Software"), to deal in the Software without
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* restriction, including without limitation the rights to use,
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* copy, modify, merge, publish, distribute, sublicense, and/or
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* sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following
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* conditions:
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*
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* The above copyright notice and this permission notice shall be
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* included in all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
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* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
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* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
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* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*/
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/include/ "skeleton.dtsi"
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/ {
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interrupt-parent = <&gic>;
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L2: l2-cache-controller@c4200000 {
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compatible = "arm,pl310-cache";
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reg = <0xc4200000 0x1000>;
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cache-unified;
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cache-level = <2>;
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};
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gic: interrupt-controller@c4301000 {
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compatible = "arm,cortex-a9-gic";
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reg = <0xc4301000 0x1000>,
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<0xc4300100 0x0100>;
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interrupt-controller;
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#interrupt-cells = <3>;
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};
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timer@c1109940 {
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compatible = "amlogic,meson6-timer";
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reg = <0xc1109940 0x14>;
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interrupts = <0 10 1>;
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};
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soc {
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compatible = "simple-bus";
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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wdt: watchdog@c1109900 {
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compatible = "amlogic,meson6-wdt";
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reg = <0xc1109900 0x8>;
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};
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uart_AO: serial@c81004c0 {
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compatible = "amlogic,meson-uart";
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reg = <0xc81004c0 0x14>;
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interrupts = <0 90 1>;
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clocks = <&clk81>;
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status = "disabled";
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};
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uart_A: serial@c81084c0 {
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compatible = "amlogic,meson-uart";
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reg = <0xc81084c0 0x14>;
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interrupts = <0 90 1>;
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clocks = <&clk81>;
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status = "disabled";
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};
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uart_B: serial@c81084dc {
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compatible = "amlogic,meson-uart";
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reg = <0xc81084dc 0x14>;
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interrupts = <0 90 1>;
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clocks = <&clk81>;
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status = "disabled";
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};
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uart_C: serial@c8108700 {
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compatible = "amlogic,meson-uart";
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reg = <0xc8108700 0x14>;
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interrupts = <0 90 1>;
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clocks = <&clk81>;
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status = "disabled";
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};
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};
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}; /* end of / */
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