linux_dsm_epyc7002/drivers/gpu
Ville Syrjälä 54f1b6e15d drm/i915: Compute display FIFO split dynamically for CHV
Consider which planes are active and compute the FIFO split based on the
relative data rates. Since we only consider the pipe src width rather
than the plane width when computing watermarks it seems best to do the
same when computing the FIFO split as well. This means the only thing we
actually have to consider for the FIFO splut is the bpp, and we can
ignore the rest.

I've just stuffed the logic into the watermark code for now. Eventually
it'll need to move into the atomic update for the crtc.

There's also one extra complication I've not yet considered; Some of the
DSPARB registers contain bits related to multiple pipes. The registers
are double buffered but apparently they update on the vblank of any
active pipe. So doing the FIFO reconfiguration properly when multiple
pipes are active is not going to be fun. But let's ignore that mess for
now.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Clint Taylor <Clinton.A.Taylor@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-06-29 10:55:52 +02:00
..
drm drm/i915: Compute display FIFO split dynamically for CHV 2015-06-29 10:55:52 +02:00
host1x gpu: host1x: Export host1x_syncpt_read() 2015-04-02 18:46:20 +02:00
ipu-v3 imx-drm changes to use media bus formats and LDB drm_panel support 2015-04-13 17:28:57 +10:00
vga
Makefile gpu: host1x: Provide a proper struct bus_type 2015-01-27 10:09:14 +01:00