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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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24a70cf2b2
If SCB exists in select blackfin cpu, developer can change the SCB priority in kernel configuration. Signed-off-by: Sonic Zhang <sonic.zhang@analog.com> Signed-off-by: Steven Miao <realmz6@gmail.com>
54 lines
1.3 KiB
C
54 lines
1.3 KiB
C
/*
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* arch/blackfin/mach-common/scb-init.c - reprogram system cross bar priority
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*
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* Copyright 2012 Analog Devices Inc.
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*
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* Licensed under the GPL-2 or later.
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*/
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#include <linux/init.h>
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#include <linux/errno.h>
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#include <linux/kernel.h>
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#include <asm/scb.h>
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__attribute__((l1_text))
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inline void scb_mi_write(unsigned long scb_mi_arbw, unsigned int slots,
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unsigned char *scb_mi_prio)
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{
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unsigned int i;
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for (i = 0; i < slots; ++i)
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bfin_write32(scb_mi_arbw, (i << SCB_SLOT_OFFSET) | scb_mi_prio[i]);
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}
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__attribute__((l1_text))
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inline void scb_mi_read(unsigned long scb_mi_arbw, unsigned int slots,
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unsigned char *scb_mi_prio)
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{
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unsigned int i;
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for (i = 0; i < slots; ++i) {
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bfin_write32(scb_mi_arbw, (0xFF << SCB_SLOT_OFFSET) | i);
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scb_mi_prio[i] = bfin_read32(scb_mi_arbw);
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}
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}
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__attribute__((l1_text))
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void init_scb(void)
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{
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unsigned int i, j;
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unsigned char scb_tmp_prio[32];
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pr_info("Init System Crossbar\n");
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for (i = 0; scb_data[i].scb_mi_arbr > 0; ++i) {
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scb_mi_write(scb_data[i].scb_mi_arbw, scb_data[i].scb_mi_slots, scb_data[i].scb_mi_prio);
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pr_debug("scb priority at 0x%lx:\n", scb_data[i].scb_mi_arbr);
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scb_mi_read(scb_data[i].scb_mi_arbw, scb_data[i].scb_mi_slots, scb_tmp_prio);
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for (j = 0; j < scb_data[i].scb_mi_slots; ++j)
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pr_debug("slot %d = %d\n", j, scb_tmp_prio[j]);
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}
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}
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