mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-26 11:05:11 +07:00
cb1f8814bb
To align with the rest of DRM terminology, the GEM VRAM helpers now use lock and unlock in places where reserve and unreserve where used before. All callers have been adapted. Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de> Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch> Link: http://patchwork.freedesktop.org/patch/msgid/20190521110831.20200-3-tzimmermann@suse.de Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
285 lines
7.5 KiB
C
285 lines
7.5 KiB
C
/*
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* Copyright 2013 Matrox Graphics
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*
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* This file is subject to the terms and conditions of the GNU General
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* Public License version 2. See the file COPYING in the main
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* directory of this archive for more details.
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*
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* Author: Christopher Harvey <charvey@matrox.com>
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*/
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#include <drm/drmP.h>
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#include "mgag200_drv.h"
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static bool warn_transparent = true;
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static bool warn_palette = true;
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/*
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Hide the cursor off screen. We can't disable the cursor hardware because it
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takes too long to re-activate and causes momentary corruption
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*/
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static void mga_hide_cursor(struct mga_device *mdev)
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{
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WREG8(MGA_CURPOSXL, 0);
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WREG8(MGA_CURPOSXH, 0);
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if (mdev->cursor.pixels_1->pin_count)
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drm_gem_vram_unpin_locked(mdev->cursor.pixels_1);
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if (mdev->cursor.pixels_2->pin_count)
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drm_gem_vram_unpin_locked(mdev->cursor.pixels_2);
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}
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int mga_crtc_cursor_set(struct drm_crtc *crtc,
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struct drm_file *file_priv,
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uint32_t handle,
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uint32_t width,
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uint32_t height)
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{
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struct drm_device *dev = crtc->dev;
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struct mga_device *mdev = (struct mga_device *)dev->dev_private;
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struct drm_gem_vram_object *pixels_1 = mdev->cursor.pixels_1;
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struct drm_gem_vram_object *pixels_2 = mdev->cursor.pixels_2;
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struct drm_gem_vram_object *pixels_current = mdev->cursor.pixels_current;
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struct drm_gem_vram_object *pixels_prev = mdev->cursor.pixels_prev;
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struct drm_gem_object *obj;
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struct drm_gem_vram_object *gbo = NULL;
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int ret = 0;
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u8 *src, *dst;
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unsigned int i, row, col;
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uint32_t colour_set[16];
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uint32_t *next_space = &colour_set[0];
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uint32_t *palette_iter;
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uint32_t this_colour;
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bool found = false;
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int colour_count = 0;
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s64 gpu_addr;
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u8 reg_index;
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u8 this_row[48];
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if (!pixels_1 || !pixels_2) {
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WREG8(MGA_CURPOSXL, 0);
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WREG8(MGA_CURPOSXH, 0);
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return -ENOTSUPP; /* Didn't allocate space for cursors */
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}
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if ((width != 64 || height != 64) && handle) {
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WREG8(MGA_CURPOSXL, 0);
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WREG8(MGA_CURPOSXH, 0);
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return -EINVAL;
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}
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BUG_ON(pixels_1 != pixels_current && pixels_1 != pixels_prev);
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BUG_ON(pixels_2 != pixels_current && pixels_2 != pixels_prev);
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BUG_ON(pixels_current == pixels_prev);
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if (!handle || !file_priv) {
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mga_hide_cursor(mdev);
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return 0;
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}
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obj = drm_gem_object_lookup(file_priv, handle);
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if (!obj)
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return -ENOENT;
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ret = drm_gem_vram_lock(pixels_1, true);
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if (ret) {
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WREG8(MGA_CURPOSXL, 0);
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WREG8(MGA_CURPOSXH, 0);
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goto out_unref;
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}
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ret = drm_gem_vram_lock(pixels_2, true);
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if (ret) {
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WREG8(MGA_CURPOSXL, 0);
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WREG8(MGA_CURPOSXH, 0);
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drm_gem_vram_unlock(pixels_1);
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goto out_unlock1;
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}
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/* Move cursor buffers into VRAM if they aren't already */
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if (!pixels_1->pin_count) {
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ret = drm_gem_vram_pin_locked(pixels_1,
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DRM_GEM_VRAM_PL_FLAG_VRAM);
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if (ret)
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goto out1;
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gpu_addr = drm_gem_vram_offset(pixels_1);
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if (gpu_addr < 0) {
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drm_gem_vram_unpin_locked(pixels_1);
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goto out1;
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}
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mdev->cursor.pixels_1_gpu_addr = gpu_addr;
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}
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if (!pixels_2->pin_count) {
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ret = drm_gem_vram_pin_locked(pixels_2,
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DRM_GEM_VRAM_PL_FLAG_VRAM);
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if (ret) {
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drm_gem_vram_unpin_locked(pixels_1);
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goto out1;
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}
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gpu_addr = drm_gem_vram_offset(pixels_2);
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if (gpu_addr < 0) {
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drm_gem_vram_unpin_locked(pixels_1);
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drm_gem_vram_unpin_locked(pixels_2);
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goto out1;
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}
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mdev->cursor.pixels_2_gpu_addr = gpu_addr;
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}
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gbo = drm_gem_vram_of_gem(obj);
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ret = drm_gem_vram_lock(gbo, true);
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if (ret) {
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dev_err(&dev->pdev->dev, "failed to lock user bo\n");
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goto out1;
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}
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src = drm_gem_vram_kmap(gbo, true, NULL);
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if (IS_ERR(src)) {
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ret = PTR_ERR(src);
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dev_err(&dev->pdev->dev, "failed to kmap user buffer updates\n");
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goto out2;
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}
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memset(&colour_set[0], 0, sizeof(uint32_t)*16);
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/* width*height*4 = 16384 */
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for (i = 0; i < 16384; i += 4) {
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this_colour = ioread32(src + i);
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/* No transparency */
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if (this_colour>>24 != 0xff &&
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this_colour>>24 != 0x0) {
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if (warn_transparent) {
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dev_info(&dev->pdev->dev, "Video card doesn't support cursors with partial transparency.\n");
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dev_info(&dev->pdev->dev, "Not enabling hardware cursor.\n");
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warn_transparent = false; /* Only tell the user once. */
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}
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ret = -EINVAL;
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goto out3;
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}
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/* Don't need to store transparent pixels as colours */
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if (this_colour>>24 == 0x0)
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continue;
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found = false;
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for (palette_iter = &colour_set[0]; palette_iter != next_space; palette_iter++) {
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if (*palette_iter == this_colour) {
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found = true;
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break;
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}
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}
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if (found)
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continue;
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/* We only support 4bit paletted cursors */
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if (colour_count >= 16) {
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if (warn_palette) {
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dev_info(&dev->pdev->dev, "Video card only supports cursors with up to 16 colours.\n");
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dev_info(&dev->pdev->dev, "Not enabling hardware cursor.\n");
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warn_palette = false; /* Only tell the user once. */
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}
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ret = -EINVAL;
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goto out3;
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}
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*next_space = this_colour;
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next_space++;
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colour_count++;
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}
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/* Program colours from cursor icon into palette */
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for (i = 0; i < colour_count; i++) {
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if (i <= 2)
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reg_index = 0x8 + i*0x4;
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else
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reg_index = 0x60 + i*0x3;
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WREG_DAC(reg_index, colour_set[i] & 0xff);
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WREG_DAC(reg_index+1, colour_set[i]>>8 & 0xff);
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WREG_DAC(reg_index+2, colour_set[i]>>16 & 0xff);
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BUG_ON((colour_set[i]>>24 & 0xff) != 0xff);
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}
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/* Map up-coming buffer to write colour indices */
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dst = drm_gem_vram_kmap(pixels_prev, true, NULL);
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if (IS_ERR(dst)) {
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ret = PTR_ERR(dst);
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dev_err(&dev->pdev->dev, "failed to kmap cursor updates\n");
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goto out3;
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}
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/* now write colour indices into hardware cursor buffer */
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for (row = 0; row < 64; row++) {
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memset(&this_row[0], 0, 48);
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for (col = 0; col < 64; col++) {
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this_colour = ioread32(src + 4*(col + 64*row));
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/* write transparent pixels */
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if (this_colour>>24 == 0x0) {
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this_row[47 - col/8] |= 0x80>>(col%8);
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continue;
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}
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/* write colour index here */
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for (i = 0; i < colour_count; i++) {
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if (colour_set[i] == this_colour) {
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if (col % 2)
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this_row[col/2] |= i<<4;
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else
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this_row[col/2] |= i;
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break;
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}
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}
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}
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memcpy_toio(dst + row*48, &this_row[0], 48);
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}
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/* Program gpu address of cursor buffer */
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if (pixels_prev == pixels_1)
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gpu_addr = mdev->cursor.pixels_1_gpu_addr;
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else
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gpu_addr = mdev->cursor.pixels_2_gpu_addr;
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WREG_DAC(MGA1064_CURSOR_BASE_ADR_LOW, (u8)((gpu_addr>>10) & 0xff));
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WREG_DAC(MGA1064_CURSOR_BASE_ADR_HI, (u8)((gpu_addr>>18) & 0x3f));
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/* Adjust cursor control register to turn on the cursor */
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WREG_DAC(MGA1064_CURSOR_CTL, 4); /* 16-colour palletized cursor mode */
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/* Now swap internal buffer pointers */
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if (mdev->cursor.pixels_1 == mdev->cursor.pixels_prev) {
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mdev->cursor.pixels_prev = mdev->cursor.pixels_2;
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mdev->cursor.pixels_current = mdev->cursor.pixels_1;
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} else if (mdev->cursor.pixels_1 == mdev->cursor.pixels_current) {
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mdev->cursor.pixels_prev = mdev->cursor.pixels_1;
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mdev->cursor.pixels_current = mdev->cursor.pixels_2;
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} else {
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BUG();
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}
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ret = 0;
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drm_gem_vram_kunmap(pixels_prev);
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out3:
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drm_gem_vram_kunmap(gbo);
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out2:
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drm_gem_vram_unlock(gbo);
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out1:
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if (ret)
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mga_hide_cursor(mdev);
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drm_gem_vram_unlock(pixels_1);
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out_unlock1:
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drm_gem_vram_unlock(pixels_2);
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out_unref:
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drm_gem_object_put_unlocked(obj);
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return ret;
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}
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int mga_crtc_cursor_move(struct drm_crtc *crtc, int x, int y)
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{
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struct mga_device *mdev = (struct mga_device *)crtc->dev->dev_private;
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/* Our origin is at (64,64) */
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x += 64;
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y += 64;
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BUG_ON(x <= 0);
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BUG_ON(y <= 0);
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BUG_ON(x & ~0xffff);
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BUG_ON(y & ~0xffff);
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WREG8(MGA_CURPOSXL, x & 0xff);
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WREG8(MGA_CURPOSXH, (x>>8) & 0xff);
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WREG8(MGA_CURPOSYL, y & 0xff);
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WREG8(MGA_CURPOSYH, (y>>8) & 0xff);
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return 0;
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}
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