mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-16 19:06:45 +07:00
221bb8a46e
VGIC implementation. - s390: support for trapping software breakpoints, nested virtualization (vSIE), the STHYI opcode, initial extensions for CPU model support. - MIPS: support for MIPS64 hosts (32-bit guests only) and lots of cleanups, preliminary to this and the upcoming support for hardware virtualization extensions. - x86: support for execute-only mappings in nested EPT; reduced vmexit latency for TSC deadline timer (by about 30%) on Intel hosts; support for more than 255 vCPUs. - PPC: bugfixes. The ugly bit is the conflicts. A couple of them are simple conflicts due to 4.7 fixes, but most of them are with other trees. There was definitely too much reliance on Acked-by here. Some conflicts are for KVM patches where _I_ gave my Acked-by, but the worst are for this pull request's patches that touch files outside arch/*/kvm. KVM submaintainers should probably learn to synchronize better with arch maintainers, with the latter providing topic branches whenever possible instead of Acked-by. This is what we do with arch/x86. And I should learn to refuse pull requests when linux-next sends scary signals, even if that means that submaintainers have to rebase their branches. Anyhow, here's the list: - arch/x86/kvm/vmx.c: handle_pcommit and EXIT_REASON_PCOMMIT was removed by the nvdimm tree. This tree adds handle_preemption_timer and EXIT_REASON_PREEMPTION_TIMER at the same place. In general all mentions of pcommit have to go. There is also a conflict between a stable fix and this patch, where the stable fix removed the vmx_create_pml_buffer function and its call. - virt/kvm/kvm_main.c: kvm_cpu_notifier was removed by the hotplug tree. This tree adds kvm_io_bus_get_dev at the same place. - virt/kvm/arm/vgic.c: a few final bugfixes went into 4.7 before the file was completely removed for 4.8. - include/linux/irqchip/arm-gic-v3.h: this one is entirely our fault; this is a change that should have gone in through the irqchip tree and pulled by kvm-arm. I think I would have rejected this kvm-arm pull request. The KVM version is the right one, except that it lacks GITS_BASER_PAGES_SHIFT. - arch/powerpc: what a mess. For the idle_book3s.S conflict, the KVM tree is the right one; everything else is trivial. In this case I am not quite sure what went wrong. The commit that is causing the mess (fd7bacbca4
, "KVM: PPC: Book3S HV: Fix TB corruption in guest exit path on HMI interrupt", 2016-05-15) touches both arch/powerpc/kernel/ and arch/powerpc/kvm/. It's large, but at 396 insertions/5 deletions I guessed that it wasn't really possible to split it and that the 5 deletions wouldn't conflict. That wasn't the case. - arch/s390: also messy. First is hypfs_diag.c where the KVM tree moved some code and the s390 tree patched it. You have to reapply the relevant part of commits6c22c98637
, plus all ofe030c1125e
, to arch/s390/kernel/diag.c. Or pick the linux-next conflict resolution from http://marc.info/?l=kvm&m=146717549531603&w=2. Second, there is a conflict in gmap.c between a stable fix and 4.8. The KVM version here is the correct one. I have pushed my resolution at refs/heads/merge-20160802 (commit 3d1f53419842) at git://git.kernel.org/pub/scm/virt/kvm/kvm.git. -----BEGIN PGP SIGNATURE----- Version: GnuPG v2.0.22 (GNU/Linux) iQEcBAABAgAGBQJXoGm7AAoJEL/70l94x66DugQIAIj703ePAFepB/fCrKHkZZia SGrsBdvAtNsOhr7FQ5qvvjLxiv/cv7CymeuJivX8H+4kuUHUllDzey+RPHYHD9X7 U6n1PdCH9F15a3IXc8tDjlDdOMNIKJixYuq1UyNZMU6NFwl00+TZf9JF8A2US65b x/41W98ilL6nNBAsoDVmCLtPNWAqQ3lajaZELGfcqRQ9ZGKcAYOaLFXHv2YHf2XC qIDMf+slBGSQ66UoATnYV2gAopNlWbZ7n0vO6tE2KyvhHZ1m399aBX1+k8la/0JI 69r+Tz7ZHUSFtmlmyByi5IAB87myy2WQHyAPwj+4vwJkDGPcl0TrupzbG7+T05Y= =42ti -----END PGP SIGNATURE----- Merge tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm Pull KVM updates from Paolo Bonzini: - ARM: GICv3 ITS emulation and various fixes. Removal of the old VGIC implementation. - s390: support for trapping software breakpoints, nested virtualization (vSIE), the STHYI opcode, initial extensions for CPU model support. - MIPS: support for MIPS64 hosts (32-bit guests only) and lots of cleanups, preliminary to this and the upcoming support for hardware virtualization extensions. - x86: support for execute-only mappings in nested EPT; reduced vmexit latency for TSC deadline timer (by about 30%) on Intel hosts; support for more than 255 vCPUs. - PPC: bugfixes. * tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm: (302 commits) KVM: PPC: Introduce KVM_CAP_PPC_HTM MIPS: Select HAVE_KVM for MIPS64_R{2,6} MIPS: KVM: Reset CP0_PageMask during host TLB flush MIPS: KVM: Fix ptr->int cast via KVM_GUEST_KSEGX() MIPS: KVM: Sign extend MFC0/RDHWR results MIPS: KVM: Fix 64-bit big endian dynamic translation MIPS: KVM: Fail if ebase doesn't fit in CP0_EBase MIPS: KVM: Use 64-bit CP0_EBase when appropriate MIPS: KVM: Set CP0_Status.KX on MIPS64 MIPS: KVM: Make entry code MIPS64 friendly MIPS: KVM: Use kmap instead of CKSEG0ADDR() MIPS: KVM: Use virt_to_phys() to get commpage PFN MIPS: Fix definition of KSEGX() for 64-bit KVM: VMX: Add VMCS to CPU's loaded VMCSs before VMPTRLD kvm: x86: nVMX: maintain internal copy of current VMCS KVM: PPC: Book3S HV: Save/restore TM state in H_CEDE KVM: PPC: Book3S HV: Pull out TM state save/restore into separate procedures KVM: arm64: vgic-its: Simplify MAPI error handling KVM: arm64: vgic-its: Make vgic_its_cmd_handle_mapi similar to other handlers KVM: arm64: vgic-its: Turn device_id validation into generic ID validation ...
355 lines
8.5 KiB
C
355 lines
8.5 KiB
C
/*
|
|
* Page table allocation functions
|
|
*
|
|
* Copyright IBM Corp. 2016
|
|
* Author(s): Martin Schwidefsky <schwidefsky@de.ibm.com>
|
|
*/
|
|
|
|
#include <linux/mm.h>
|
|
#include <linux/sysctl.h>
|
|
#include <asm/mmu_context.h>
|
|
#include <asm/pgalloc.h>
|
|
#include <asm/gmap.h>
|
|
#include <asm/tlb.h>
|
|
#include <asm/tlbflush.h>
|
|
|
|
#ifdef CONFIG_PGSTE
|
|
|
|
static int page_table_allocate_pgste_min = 0;
|
|
static int page_table_allocate_pgste_max = 1;
|
|
int page_table_allocate_pgste = 0;
|
|
EXPORT_SYMBOL(page_table_allocate_pgste);
|
|
|
|
static struct ctl_table page_table_sysctl[] = {
|
|
{
|
|
.procname = "allocate_pgste",
|
|
.data = &page_table_allocate_pgste,
|
|
.maxlen = sizeof(int),
|
|
.mode = S_IRUGO | S_IWUSR,
|
|
.proc_handler = proc_dointvec,
|
|
.extra1 = &page_table_allocate_pgste_min,
|
|
.extra2 = &page_table_allocate_pgste_max,
|
|
},
|
|
{ }
|
|
};
|
|
|
|
static struct ctl_table page_table_sysctl_dir[] = {
|
|
{
|
|
.procname = "vm",
|
|
.maxlen = 0,
|
|
.mode = 0555,
|
|
.child = page_table_sysctl,
|
|
},
|
|
{ }
|
|
};
|
|
|
|
static int __init page_table_register_sysctl(void)
|
|
{
|
|
return register_sysctl_table(page_table_sysctl_dir) ? 0 : -ENOMEM;
|
|
}
|
|
__initcall(page_table_register_sysctl);
|
|
|
|
#endif /* CONFIG_PGSTE */
|
|
|
|
unsigned long *crst_table_alloc(struct mm_struct *mm)
|
|
{
|
|
struct page *page = alloc_pages(GFP_KERNEL, 2);
|
|
|
|
if (!page)
|
|
return NULL;
|
|
return (unsigned long *) page_to_phys(page);
|
|
}
|
|
|
|
void crst_table_free(struct mm_struct *mm, unsigned long *table)
|
|
{
|
|
free_pages((unsigned long) table, 2);
|
|
}
|
|
|
|
static void __crst_table_upgrade(void *arg)
|
|
{
|
|
struct mm_struct *mm = arg;
|
|
|
|
if (current->active_mm == mm) {
|
|
clear_user_asce();
|
|
set_user_asce(mm);
|
|
}
|
|
__tlb_flush_local();
|
|
}
|
|
|
|
int crst_table_upgrade(struct mm_struct *mm)
|
|
{
|
|
unsigned long *table, *pgd;
|
|
|
|
/* upgrade should only happen from 3 to 4 levels */
|
|
BUG_ON(mm->context.asce_limit != (1UL << 42));
|
|
|
|
table = crst_table_alloc(mm);
|
|
if (!table)
|
|
return -ENOMEM;
|
|
|
|
spin_lock_bh(&mm->page_table_lock);
|
|
pgd = (unsigned long *) mm->pgd;
|
|
crst_table_init(table, _REGION2_ENTRY_EMPTY);
|
|
pgd_populate(mm, (pgd_t *) table, (pud_t *) pgd);
|
|
mm->pgd = (pgd_t *) table;
|
|
mm->context.asce_limit = 1UL << 53;
|
|
mm->context.asce = __pa(mm->pgd) | _ASCE_TABLE_LENGTH |
|
|
_ASCE_USER_BITS | _ASCE_TYPE_REGION2;
|
|
mm->task_size = mm->context.asce_limit;
|
|
spin_unlock_bh(&mm->page_table_lock);
|
|
|
|
on_each_cpu(__crst_table_upgrade, mm, 0);
|
|
return 0;
|
|
}
|
|
|
|
void crst_table_downgrade(struct mm_struct *mm)
|
|
{
|
|
pgd_t *pgd;
|
|
|
|
/* downgrade should only happen from 3 to 2 levels (compat only) */
|
|
BUG_ON(mm->context.asce_limit != (1UL << 42));
|
|
|
|
if (current->active_mm == mm) {
|
|
clear_user_asce();
|
|
__tlb_flush_mm(mm);
|
|
}
|
|
|
|
pgd = mm->pgd;
|
|
mm->pgd = (pgd_t *) (pgd_val(*pgd) & _REGION_ENTRY_ORIGIN);
|
|
mm->context.asce_limit = 1UL << 31;
|
|
mm->context.asce = __pa(mm->pgd) | _ASCE_TABLE_LENGTH |
|
|
_ASCE_USER_BITS | _ASCE_TYPE_SEGMENT;
|
|
mm->task_size = mm->context.asce_limit;
|
|
crst_table_free(mm, (unsigned long *) pgd);
|
|
|
|
if (current->active_mm == mm)
|
|
set_user_asce(mm);
|
|
}
|
|
|
|
static inline unsigned int atomic_xor_bits(atomic_t *v, unsigned int bits)
|
|
{
|
|
unsigned int old, new;
|
|
|
|
do {
|
|
old = atomic_read(v);
|
|
new = old ^ bits;
|
|
} while (atomic_cmpxchg(v, old, new) != old);
|
|
return new;
|
|
}
|
|
|
|
#ifdef CONFIG_PGSTE
|
|
|
|
struct page *page_table_alloc_pgste(struct mm_struct *mm)
|
|
{
|
|
struct page *page;
|
|
unsigned long *table;
|
|
|
|
page = alloc_page(GFP_KERNEL|__GFP_REPEAT);
|
|
if (page) {
|
|
table = (unsigned long *) page_to_phys(page);
|
|
clear_table(table, _PAGE_INVALID, PAGE_SIZE/2);
|
|
clear_table(table + PTRS_PER_PTE, 0, PAGE_SIZE/2);
|
|
}
|
|
return page;
|
|
}
|
|
|
|
void page_table_free_pgste(struct page *page)
|
|
{
|
|
__free_page(page);
|
|
}
|
|
|
|
#endif /* CONFIG_PGSTE */
|
|
|
|
/*
|
|
* page table entry allocation/free routines.
|
|
*/
|
|
unsigned long *page_table_alloc(struct mm_struct *mm)
|
|
{
|
|
unsigned long *table;
|
|
struct page *page;
|
|
unsigned int mask, bit;
|
|
|
|
/* Try to get a fragment of a 4K page as a 2K page table */
|
|
if (!mm_alloc_pgste(mm)) {
|
|
table = NULL;
|
|
spin_lock_bh(&mm->context.pgtable_lock);
|
|
if (!list_empty(&mm->context.pgtable_list)) {
|
|
page = list_first_entry(&mm->context.pgtable_list,
|
|
struct page, lru);
|
|
mask = atomic_read(&page->_mapcount);
|
|
mask = (mask | (mask >> 4)) & 3;
|
|
if (mask != 3) {
|
|
table = (unsigned long *) page_to_phys(page);
|
|
bit = mask & 1; /* =1 -> second 2K */
|
|
if (bit)
|
|
table += PTRS_PER_PTE;
|
|
atomic_xor_bits(&page->_mapcount, 1U << bit);
|
|
list_del(&page->lru);
|
|
}
|
|
}
|
|
spin_unlock_bh(&mm->context.pgtable_lock);
|
|
if (table)
|
|
return table;
|
|
}
|
|
/* Allocate a fresh page */
|
|
page = alloc_page(GFP_KERNEL);
|
|
if (!page)
|
|
return NULL;
|
|
if (!pgtable_page_ctor(page)) {
|
|
__free_page(page);
|
|
return NULL;
|
|
}
|
|
/* Initialize page table */
|
|
table = (unsigned long *) page_to_phys(page);
|
|
if (mm_alloc_pgste(mm)) {
|
|
/* Return 4K page table with PGSTEs */
|
|
atomic_set(&page->_mapcount, 3);
|
|
clear_table(table, _PAGE_INVALID, PAGE_SIZE/2);
|
|
clear_table(table + PTRS_PER_PTE, 0, PAGE_SIZE/2);
|
|
} else {
|
|
/* Return the first 2K fragment of the page */
|
|
atomic_set(&page->_mapcount, 1);
|
|
clear_table(table, _PAGE_INVALID, PAGE_SIZE);
|
|
spin_lock_bh(&mm->context.pgtable_lock);
|
|
list_add(&page->lru, &mm->context.pgtable_list);
|
|
spin_unlock_bh(&mm->context.pgtable_lock);
|
|
}
|
|
return table;
|
|
}
|
|
|
|
void page_table_free(struct mm_struct *mm, unsigned long *table)
|
|
{
|
|
struct page *page;
|
|
unsigned int bit, mask;
|
|
|
|
page = pfn_to_page(__pa(table) >> PAGE_SHIFT);
|
|
if (!mm_alloc_pgste(mm)) {
|
|
/* Free 2K page table fragment of a 4K page */
|
|
bit = (__pa(table) & ~PAGE_MASK)/(PTRS_PER_PTE*sizeof(pte_t));
|
|
spin_lock_bh(&mm->context.pgtable_lock);
|
|
mask = atomic_xor_bits(&page->_mapcount, 1U << bit);
|
|
if (mask & 3)
|
|
list_add(&page->lru, &mm->context.pgtable_list);
|
|
else
|
|
list_del(&page->lru);
|
|
spin_unlock_bh(&mm->context.pgtable_lock);
|
|
if (mask != 0)
|
|
return;
|
|
}
|
|
|
|
pgtable_page_dtor(page);
|
|
atomic_set(&page->_mapcount, -1);
|
|
__free_page(page);
|
|
}
|
|
|
|
void page_table_free_rcu(struct mmu_gather *tlb, unsigned long *table,
|
|
unsigned long vmaddr)
|
|
{
|
|
struct mm_struct *mm;
|
|
struct page *page;
|
|
unsigned int bit, mask;
|
|
|
|
mm = tlb->mm;
|
|
page = pfn_to_page(__pa(table) >> PAGE_SHIFT);
|
|
if (mm_alloc_pgste(mm)) {
|
|
gmap_unlink(mm, table, vmaddr);
|
|
table = (unsigned long *) (__pa(table) | 3);
|
|
tlb_remove_table(tlb, table);
|
|
return;
|
|
}
|
|
bit = (__pa(table) & ~PAGE_MASK) / (PTRS_PER_PTE*sizeof(pte_t));
|
|
spin_lock_bh(&mm->context.pgtable_lock);
|
|
mask = atomic_xor_bits(&page->_mapcount, 0x11U << bit);
|
|
if (mask & 3)
|
|
list_add_tail(&page->lru, &mm->context.pgtable_list);
|
|
else
|
|
list_del(&page->lru);
|
|
spin_unlock_bh(&mm->context.pgtable_lock);
|
|
table = (unsigned long *) (__pa(table) | (1U << bit));
|
|
tlb_remove_table(tlb, table);
|
|
}
|
|
|
|
static void __tlb_remove_table(void *_table)
|
|
{
|
|
unsigned int mask = (unsigned long) _table & 3;
|
|
void *table = (void *)((unsigned long) _table ^ mask);
|
|
struct page *page = pfn_to_page(__pa(table) >> PAGE_SHIFT);
|
|
|
|
switch (mask) {
|
|
case 0: /* pmd or pud */
|
|
free_pages((unsigned long) table, 2);
|
|
break;
|
|
case 1: /* lower 2K of a 4K page table */
|
|
case 2: /* higher 2K of a 4K page table */
|
|
if (atomic_xor_bits(&page->_mapcount, mask << 4) != 0)
|
|
break;
|
|
/* fallthrough */
|
|
case 3: /* 4K page table with pgstes */
|
|
pgtable_page_dtor(page);
|
|
atomic_set(&page->_mapcount, -1);
|
|
__free_page(page);
|
|
break;
|
|
}
|
|
}
|
|
|
|
static void tlb_remove_table_smp_sync(void *arg)
|
|
{
|
|
/* Simply deliver the interrupt */
|
|
}
|
|
|
|
static void tlb_remove_table_one(void *table)
|
|
{
|
|
/*
|
|
* This isn't an RCU grace period and hence the page-tables cannot be
|
|
* assumed to be actually RCU-freed.
|
|
*
|
|
* It is however sufficient for software page-table walkers that rely
|
|
* on IRQ disabling. See the comment near struct mmu_table_batch.
|
|
*/
|
|
smp_call_function(tlb_remove_table_smp_sync, NULL, 1);
|
|
__tlb_remove_table(table);
|
|
}
|
|
|
|
static void tlb_remove_table_rcu(struct rcu_head *head)
|
|
{
|
|
struct mmu_table_batch *batch;
|
|
int i;
|
|
|
|
batch = container_of(head, struct mmu_table_batch, rcu);
|
|
|
|
for (i = 0; i < batch->nr; i++)
|
|
__tlb_remove_table(batch->tables[i]);
|
|
|
|
free_page((unsigned long)batch);
|
|
}
|
|
|
|
void tlb_table_flush(struct mmu_gather *tlb)
|
|
{
|
|
struct mmu_table_batch **batch = &tlb->batch;
|
|
|
|
if (*batch) {
|
|
call_rcu_sched(&(*batch)->rcu, tlb_remove_table_rcu);
|
|
*batch = NULL;
|
|
}
|
|
}
|
|
|
|
void tlb_remove_table(struct mmu_gather *tlb, void *table)
|
|
{
|
|
struct mmu_table_batch **batch = &tlb->batch;
|
|
|
|
tlb->mm->context.flush_mm = 1;
|
|
if (*batch == NULL) {
|
|
*batch = (struct mmu_table_batch *)
|
|
__get_free_page(GFP_NOWAIT | __GFP_NOWARN);
|
|
if (*batch == NULL) {
|
|
__tlb_flush_mm_lazy(tlb->mm);
|
|
tlb_remove_table_one(table);
|
|
return;
|
|
}
|
|
(*batch)->nr = 0;
|
|
}
|
|
(*batch)->tables[(*batch)->nr++] = table;
|
|
if ((*batch)->nr == MAX_TABLE_BATCH)
|
|
tlb_flush_mmu(tlb);
|
|
}
|