Nicholas Piggin 54071e4176 powerpc/64s: micro-optimise __hard_irq_enable() for mtmsrd L=1 support ... Book3S minimum supported ISA version now requires mtmsrd L=1. This instruction does not require bits other than RI and EE to be supplied, so __hard_irq_enable() and __hard_irq_disable() does not have to read the kernel_msr from paca. Interrupt entry code already relies on L=1 support. Signed-off-by: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>		2018-06-03 20:40:26 +10:00
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asm	powerpc/64s: micro-optimise __hard_irq_enable() for mtmsrd L=1 support	2018-06-03 20:40:26 +10:00
uapi/asm	KVM changes for 4.16	2018-02-10 13:16:35 -08:00