mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-18 12:26:54 +07:00
cb84c2b401
hexagon:defconfig fails to build in linux-next since commit 332fd7c4fe
("genirq: Generic chip: Change irq_reg_{readl,writel} arguments").
The primary build failure is
arch/hexagon/include/asm/cacheflush.h: In function 'copy_to_user_page':
arch/hexagon/include/asm/cacheflush.h:89:22: error: 'VM_EXEC' undeclared
This is the result of including of <linux/io.h> from <linux/irq.h>,
which is now necessary due to the use of readl and writel from irq.h.
This causes recursive inclusions in hexagon code; cacheflush.h is included
from mm.h prior to the definition of VM_EXEC.
Fix the problem by moving copy_to_user_page from the hexagon include file to
arch/hexagon/mm/cache.c, similar to other architectures. After this change,
several redefinitions of readl and writel are reported. Those are caused
by recursive inclusions of io.h and asm/cacheflush.h. Fix those problems by
reducing the number of files included from those files. Also, it was necessary
to stop including asm-generic/cacheflush.h from asm/cacheflush.h. Instead,
functionality originally provided by asm-generic/cacheflush.h is now coded
in asm/cacheflush.h directly.
Cc: Kevin Cernekee <cernekee@gmail.com>
Cc: Jason Cooper <jason@lakedaemon.net>
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
signed-off-by: Richard Kuo <rkuo@codeaurora.org>
140 lines
3.0 KiB
C
140 lines
3.0 KiB
C
/*
|
|
* Cache management functions for Hexagon
|
|
*
|
|
* Copyright (c) 2010-2011, The Linux Foundation. All rights reserved.
|
|
*
|
|
* This program is free software; you can redistribute it and/or modify
|
|
* it under the terms of the GNU General Public License version 2 and
|
|
* only version 2 as published by the Free Software Foundation.
|
|
*
|
|
* This program is distributed in the hope that it will be useful,
|
|
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
|
* GNU General Public License for more details.
|
|
*
|
|
* You should have received a copy of the GNU General Public License
|
|
* along with this program; if not, write to the Free Software
|
|
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
|
|
* 02110-1301, USA.
|
|
*/
|
|
|
|
#include <linux/mm.h>
|
|
#include <asm/cacheflush.h>
|
|
#include <asm/hexagon_vm.h>
|
|
|
|
#define spanlines(start, end) \
|
|
(((end - (start & ~(LINESIZE - 1))) >> LINEBITS) + 1)
|
|
|
|
void flush_dcache_range(unsigned long start, unsigned long end)
|
|
{
|
|
unsigned long lines = spanlines(start, end-1);
|
|
unsigned long i, flags;
|
|
|
|
start &= ~(LINESIZE - 1);
|
|
|
|
local_irq_save(flags);
|
|
|
|
for (i = 0; i < lines; i++) {
|
|
__asm__ __volatile__ (
|
|
" dccleaninva(%0); "
|
|
:
|
|
: "r" (start)
|
|
);
|
|
start += LINESIZE;
|
|
}
|
|
local_irq_restore(flags);
|
|
}
|
|
|
|
void flush_icache_range(unsigned long start, unsigned long end)
|
|
{
|
|
unsigned long lines = spanlines(start, end-1);
|
|
unsigned long i, flags;
|
|
|
|
start &= ~(LINESIZE - 1);
|
|
|
|
local_irq_save(flags);
|
|
|
|
for (i = 0; i < lines; i++) {
|
|
__asm__ __volatile__ (
|
|
" dccleana(%0); "
|
|
" icinva(%0); "
|
|
:
|
|
: "r" (start)
|
|
);
|
|
start += LINESIZE;
|
|
}
|
|
__asm__ __volatile__ (
|
|
"isync"
|
|
);
|
|
local_irq_restore(flags);
|
|
}
|
|
EXPORT_SYMBOL(flush_icache_range);
|
|
|
|
void hexagon_clean_dcache_range(unsigned long start, unsigned long end)
|
|
{
|
|
unsigned long lines = spanlines(start, end-1);
|
|
unsigned long i, flags;
|
|
|
|
start &= ~(LINESIZE - 1);
|
|
|
|
local_irq_save(flags);
|
|
|
|
for (i = 0; i < lines; i++) {
|
|
__asm__ __volatile__ (
|
|
" dccleana(%0); "
|
|
:
|
|
: "r" (start)
|
|
);
|
|
start += LINESIZE;
|
|
}
|
|
local_irq_restore(flags);
|
|
}
|
|
|
|
void hexagon_inv_dcache_range(unsigned long start, unsigned long end)
|
|
{
|
|
unsigned long lines = spanlines(start, end-1);
|
|
unsigned long i, flags;
|
|
|
|
start &= ~(LINESIZE - 1);
|
|
|
|
local_irq_save(flags);
|
|
|
|
for (i = 0; i < lines; i++) {
|
|
__asm__ __volatile__ (
|
|
" dcinva(%0); "
|
|
:
|
|
: "r" (start)
|
|
);
|
|
start += LINESIZE;
|
|
}
|
|
local_irq_restore(flags);
|
|
}
|
|
|
|
|
|
|
|
|
|
/*
|
|
* This is just really brutal and shouldn't be used anyways,
|
|
* especially on V2. Left here just in case.
|
|
*/
|
|
void flush_cache_all_hexagon(void)
|
|
{
|
|
unsigned long flags;
|
|
local_irq_save(flags);
|
|
__vmcache_ickill();
|
|
__vmcache_dckill();
|
|
__vmcache_l2kill();
|
|
local_irq_restore(flags);
|
|
mb();
|
|
}
|
|
|
|
void copy_to_user_page(struct vm_area_struct *vma, struct page *page,
|
|
unsigned long vaddr, void *dst, void *src, int len)
|
|
{
|
|
memcpy(dst, src, len);
|
|
if (vma->vm_flags & VM_EXEC) {
|
|
flush_icache_range((unsigned long) dst,
|
|
(unsigned long) dst + len);
|
|
}
|
|
}
|