mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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b19148f6e2
s390s arch_setup_msi_irqs function ensures that we don't return with more irqs than the PCI architecture allows and that a single PCI function doesn't consume more irqs than the kernel is configured for. At least the last check doesn't help much and should take the sum of all irqs into account. Since that's already done by irq_alloc_desc we can remove this check. As for the first check we should use the value provided by the firmware which can be less than what the PCI architecture allows. Signed-off-by: Sebastian Ott <sebott@linux.vnet.ibm.com> Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
394 lines
8.1 KiB
C
394 lines
8.1 KiB
C
/*
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* Copyright IBM Corp. 2012
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*
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* Author(s):
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* Jan Glauber <jang@linux.vnet.ibm.com>
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*/
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#define KMSG_COMPONENT "zpci"
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#define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
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#include <linux/kernel.h>
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#include <linux/slab.h>
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#include <linux/err.h>
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#include <linux/delay.h>
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#include <linux/pci.h>
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#include <asm/pci_debug.h>
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#include <asm/pci_clp.h>
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static inline void zpci_err_clp(unsigned int rsp, int rc)
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{
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struct {
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unsigned int rsp;
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int rc;
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} __packed data = {rsp, rc};
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zpci_err_hex(&data, sizeof(data));
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}
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/*
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* Call Logical Processor
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* Retry logic is handled by the caller.
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*/
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static inline u8 clp_instr(void *data)
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{
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struct { u8 _[CLP_BLK_SIZE]; } *req = data;
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u64 ignored;
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u8 cc;
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asm volatile (
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" .insn rrf,0xb9a00000,%[ign],%[req],0x0,0x2\n"
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" ipm %[cc]\n"
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" srl %[cc],28\n"
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: [cc] "=d" (cc), [ign] "=d" (ignored), "+m" (*req)
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: [req] "a" (req)
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: "cc");
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return cc;
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}
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static void *clp_alloc_block(gfp_t gfp_mask)
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{
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return (void *) __get_free_pages(gfp_mask, get_order(CLP_BLK_SIZE));
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}
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static void clp_free_block(void *ptr)
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{
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free_pages((unsigned long) ptr, get_order(CLP_BLK_SIZE));
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}
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static void clp_store_query_pci_fngrp(struct zpci_dev *zdev,
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struct clp_rsp_query_pci_grp *response)
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{
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zdev->tlb_refresh = response->refresh;
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zdev->dma_mask = response->dasm;
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zdev->msi_addr = response->msia;
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zdev->max_msi = response->noi;
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zdev->fmb_update = response->mui;
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switch (response->version) {
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case 1:
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zdev->max_bus_speed = PCIE_SPEED_5_0GT;
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break;
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default:
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zdev->max_bus_speed = PCI_SPEED_UNKNOWN;
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break;
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}
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}
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static int clp_query_pci_fngrp(struct zpci_dev *zdev, u8 pfgid)
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{
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struct clp_req_rsp_query_pci_grp *rrb;
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int rc;
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rrb = clp_alloc_block(GFP_KERNEL);
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if (!rrb)
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return -ENOMEM;
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memset(rrb, 0, sizeof(*rrb));
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rrb->request.hdr.len = sizeof(rrb->request);
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rrb->request.hdr.cmd = CLP_QUERY_PCI_FNGRP;
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rrb->response.hdr.len = sizeof(rrb->response);
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rrb->request.pfgid = pfgid;
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rc = clp_instr(rrb);
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if (!rc && rrb->response.hdr.rsp == CLP_RC_OK)
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clp_store_query_pci_fngrp(zdev, &rrb->response);
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else {
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zpci_err("Q PCI FGRP:\n");
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zpci_err_clp(rrb->response.hdr.rsp, rc);
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rc = -EIO;
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}
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clp_free_block(rrb);
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return rc;
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}
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static int clp_store_query_pci_fn(struct zpci_dev *zdev,
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struct clp_rsp_query_pci *response)
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{
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int i;
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for (i = 0; i < PCI_BAR_COUNT; i++) {
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zdev->bars[i].val = le32_to_cpu(response->bar[i]);
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zdev->bars[i].size = response->bar_size[i];
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}
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zdev->start_dma = response->sdma;
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zdev->end_dma = response->edma;
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zdev->pchid = response->pchid;
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zdev->pfgid = response->pfgid;
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zdev->pft = response->pft;
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zdev->vfn = response->vfn;
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zdev->uid = response->uid;
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memcpy(zdev->pfip, response->pfip, sizeof(zdev->pfip));
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if (response->util_str_avail) {
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memcpy(zdev->util_str, response->util_str,
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sizeof(zdev->util_str));
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}
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return 0;
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}
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static int clp_query_pci_fn(struct zpci_dev *zdev, u32 fh)
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{
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struct clp_req_rsp_query_pci *rrb;
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int rc;
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rrb = clp_alloc_block(GFP_KERNEL);
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if (!rrb)
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return -ENOMEM;
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memset(rrb, 0, sizeof(*rrb));
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rrb->request.hdr.len = sizeof(rrb->request);
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rrb->request.hdr.cmd = CLP_QUERY_PCI_FN;
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rrb->response.hdr.len = sizeof(rrb->response);
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rrb->request.fh = fh;
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rc = clp_instr(rrb);
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if (!rc && rrb->response.hdr.rsp == CLP_RC_OK) {
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rc = clp_store_query_pci_fn(zdev, &rrb->response);
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if (rc)
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goto out;
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if (rrb->response.pfgid)
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rc = clp_query_pci_fngrp(zdev, rrb->response.pfgid);
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} else {
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zpci_err("Q PCI FN:\n");
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zpci_err_clp(rrb->response.hdr.rsp, rc);
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rc = -EIO;
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}
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out:
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clp_free_block(rrb);
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return rc;
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}
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int clp_add_pci_device(u32 fid, u32 fh, int configured)
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{
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struct zpci_dev *zdev;
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int rc;
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zpci_dbg(3, "add fid:%x, fh:%x, c:%d\n", fid, fh, configured);
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zdev = kzalloc(sizeof(*zdev), GFP_KERNEL);
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if (!zdev)
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return -ENOMEM;
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zdev->fh = fh;
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zdev->fid = fid;
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/* Query function properties and update zdev */
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rc = clp_query_pci_fn(zdev, fh);
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if (rc)
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goto error;
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if (configured)
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zdev->state = ZPCI_FN_STATE_CONFIGURED;
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else
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zdev->state = ZPCI_FN_STATE_STANDBY;
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rc = zpci_create_device(zdev);
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if (rc)
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goto error;
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return 0;
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error:
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kfree(zdev);
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return rc;
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}
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/*
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* Enable/Disable a given PCI function defined by its function handle.
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*/
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static int clp_set_pci_fn(u32 *fh, u8 nr_dma_as, u8 command)
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{
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struct clp_req_rsp_set_pci *rrb;
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int rc, retries = 100;
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rrb = clp_alloc_block(GFP_KERNEL);
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if (!rrb)
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return -ENOMEM;
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do {
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memset(rrb, 0, sizeof(*rrb));
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rrb->request.hdr.len = sizeof(rrb->request);
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rrb->request.hdr.cmd = CLP_SET_PCI_FN;
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rrb->response.hdr.len = sizeof(rrb->response);
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rrb->request.fh = *fh;
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rrb->request.oc = command;
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rrb->request.ndas = nr_dma_as;
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rc = clp_instr(rrb);
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if (rrb->response.hdr.rsp == CLP_RC_SETPCIFN_BUSY) {
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retries--;
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if (retries < 0)
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break;
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msleep(20);
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}
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} while (rrb->response.hdr.rsp == CLP_RC_SETPCIFN_BUSY);
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if (!rc && rrb->response.hdr.rsp == CLP_RC_OK)
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*fh = rrb->response.fh;
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else {
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zpci_err("Set PCI FN:\n");
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zpci_err_clp(rrb->response.hdr.rsp, rc);
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rc = -EIO;
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}
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clp_free_block(rrb);
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return rc;
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}
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int clp_enable_fh(struct zpci_dev *zdev, u8 nr_dma_as)
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{
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u32 fh = zdev->fh;
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int rc;
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rc = clp_set_pci_fn(&fh, nr_dma_as, CLP_SET_ENABLE_PCI_FN);
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if (!rc)
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/* Success -> store enabled handle in zdev */
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zdev->fh = fh;
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zpci_dbg(3, "ena fid:%x, fh:%x, rc:%d\n", zdev->fid, zdev->fh, rc);
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return rc;
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}
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int clp_disable_fh(struct zpci_dev *zdev)
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{
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u32 fh = zdev->fh;
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int rc;
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if (!zdev_enabled(zdev))
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return 0;
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rc = clp_set_pci_fn(&fh, 0, CLP_SET_DISABLE_PCI_FN);
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if (!rc)
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/* Success -> store disabled handle in zdev */
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zdev->fh = fh;
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zpci_dbg(3, "dis fid:%x, fh:%x, rc:%d\n", zdev->fid, zdev->fh, rc);
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return rc;
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}
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static int clp_list_pci(struct clp_req_rsp_list_pci *rrb,
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void (*cb)(struct clp_fh_list_entry *entry))
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{
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u64 resume_token = 0;
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int entries, i, rc;
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do {
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memset(rrb, 0, sizeof(*rrb));
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rrb->request.hdr.len = sizeof(rrb->request);
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rrb->request.hdr.cmd = CLP_LIST_PCI;
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/* store as many entries as possible */
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rrb->response.hdr.len = CLP_BLK_SIZE - LIST_PCI_HDR_LEN;
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rrb->request.resume_token = resume_token;
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/* Get PCI function handle list */
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rc = clp_instr(rrb);
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if (rc || rrb->response.hdr.rsp != CLP_RC_OK) {
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zpci_err("List PCI FN:\n");
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zpci_err_clp(rrb->response.hdr.rsp, rc);
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rc = -EIO;
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goto out;
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}
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WARN_ON_ONCE(rrb->response.entry_size !=
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sizeof(struct clp_fh_list_entry));
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entries = (rrb->response.hdr.len - LIST_PCI_HDR_LEN) /
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rrb->response.entry_size;
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resume_token = rrb->response.resume_token;
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for (i = 0; i < entries; i++)
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cb(&rrb->response.fh_list[i]);
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} while (resume_token);
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out:
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return rc;
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}
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static void __clp_add(struct clp_fh_list_entry *entry)
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{
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if (!entry->vendor_id)
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return;
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clp_add_pci_device(entry->fid, entry->fh, entry->config_state);
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}
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static void __clp_rescan(struct clp_fh_list_entry *entry)
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{
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struct zpci_dev *zdev;
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if (!entry->vendor_id)
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return;
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zdev = get_zdev_by_fid(entry->fid);
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if (!zdev) {
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clp_add_pci_device(entry->fid, entry->fh, entry->config_state);
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return;
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}
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if (!entry->config_state) {
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/*
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* The handle is already disabled, that means no iota/irq freeing via
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* the firmware interfaces anymore. Need to free resources manually
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* (DMA memory, debug, sysfs)...
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*/
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zpci_stop_device(zdev);
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}
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}
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static void __clp_update(struct clp_fh_list_entry *entry)
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{
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struct zpci_dev *zdev;
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if (!entry->vendor_id)
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return;
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zdev = get_zdev_by_fid(entry->fid);
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if (!zdev)
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return;
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zdev->fh = entry->fh;
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}
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int clp_scan_pci_devices(void)
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{
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struct clp_req_rsp_list_pci *rrb;
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int rc;
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rrb = clp_alloc_block(GFP_KERNEL);
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if (!rrb)
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return -ENOMEM;
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rc = clp_list_pci(rrb, __clp_add);
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clp_free_block(rrb);
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return rc;
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}
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int clp_rescan_pci_devices(void)
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{
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struct clp_req_rsp_list_pci *rrb;
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int rc;
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rrb = clp_alloc_block(GFP_KERNEL);
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if (!rrb)
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return -ENOMEM;
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rc = clp_list_pci(rrb, __clp_rescan);
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clp_free_block(rrb);
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return rc;
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}
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int clp_rescan_pci_devices_simple(void)
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{
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struct clp_req_rsp_list_pci *rrb;
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int rc;
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rrb = clp_alloc_block(GFP_NOWAIT);
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if (!rrb)
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return -ENOMEM;
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rc = clp_list_pci(rrb, __clp_update);
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clp_free_block(rrb);
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return rc;
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}
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