mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-20 01:27:51 +07:00
c44ef60e43
We can have exactly 4GB sized ppgtt with 32bit system. size_t is inadequate for this. v2: Convert a lot more places (Daniel) Signed-off-by: Mika Kuoppala <mika.kuoppala@intel.com> Reviewed-by: Michel Thierry <michel.thierry@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
33 lines
847 B
C
33 lines
847 B
C
/* Common header for intel-gtt.ko and i915.ko */
|
|
|
|
#ifndef _DRM_INTEL_GTT_H
|
|
#define _DRM_INTEL_GTT_H
|
|
|
|
void intel_gtt_get(u64 *gtt_total, size_t *stolen_size,
|
|
phys_addr_t *mappable_base, u64 *mappable_end);
|
|
|
|
int intel_gmch_probe(struct pci_dev *bridge_pdev, struct pci_dev *gpu_pdev,
|
|
struct agp_bridge_data *bridge);
|
|
void intel_gmch_remove(void);
|
|
|
|
bool intel_enable_gtt(void);
|
|
|
|
void intel_gtt_chipset_flush(void);
|
|
void intel_gtt_insert_sg_entries(struct sg_table *st,
|
|
unsigned int pg_start,
|
|
unsigned int flags);
|
|
void intel_gtt_clear_range(unsigned int first_entry, unsigned int num_entries);
|
|
|
|
/* Special gtt memory types */
|
|
#define AGP_DCACHE_MEMORY 1
|
|
#define AGP_PHYS_MEMORY 2
|
|
|
|
/* flag for GFDT type */
|
|
#define AGP_USER_CACHED_MEMORY_GFDT (1 << 3)
|
|
|
|
#ifdef CONFIG_INTEL_IOMMU
|
|
extern int intel_iommu_gfx_mapped;
|
|
#endif
|
|
|
|
#endif
|