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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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9949e702e6
Some host controller hardware controllers may not advertise correct version in UFS HCI VER register. To workaround this, add new quirk and call the host controller hardware vendor specific callback to get the correct UFS HCI version register value. Signed-off-by: Yaniv Gardi <ygardi@codeaurora.org> Reviewed-by: Akinobu Mita <akinobu.mita@gmail.com> Signed-off-by: James Bottomley <JBottomley@Odin.com>
657 lines
20 KiB
C
657 lines
20 KiB
C
/*
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* Universal Flash Storage Host controller driver
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*
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* This code is based on drivers/scsi/ufs/ufshcd.h
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* Copyright (C) 2011-2013 Samsung India Software Operations
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*
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* Authors:
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* Santosh Yaraganavi <santosh.sy@samsung.com>
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* Vinayak Holikatti <h.vinayak@samsung.com>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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* See the COPYING file in the top-level directory or visit
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* <http://www.gnu.org/licenses/gpl-2.0.html>
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* This program is provided "AS IS" and "WITH ALL FAULTS" and
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* without warranty of any kind. You are solely responsible for
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* determining the appropriateness of using and distributing
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* the program and assume all risks associated with your exercise
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* of rights with respect to the program, including but not limited
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* to infringement of third party rights, the risks and costs of
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* program errors, damage to or loss of data, programs or equipment,
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* and unavailability or interruption of operations. Under no
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* circumstances will the contributor of this Program be liable for
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* any damages of any kind arising from your use or distribution of
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* this program.
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*/
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#ifndef _UFSHCD_H
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#define _UFSHCD_H
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#include <linux/module.h>
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/interrupt.h>
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#include <linux/io.h>
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#include <linux/delay.h>
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#include <linux/slab.h>
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#include <linux/spinlock.h>
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#include <linux/workqueue.h>
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#include <linux/errno.h>
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#include <linux/types.h>
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#include <linux/wait.h>
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#include <linux/bitops.h>
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#include <linux/pm_runtime.h>
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#include <linux/clk.h>
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#include <linux/completion.h>
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#include <linux/regulator/consumer.h>
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#include <asm/irq.h>
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#include <asm/byteorder.h>
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#include <scsi/scsi.h>
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#include <scsi/scsi_cmnd.h>
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#include <scsi/scsi_host.h>
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#include <scsi/scsi_tcq.h>
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#include <scsi/scsi_dbg.h>
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#include <scsi/scsi_eh.h>
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#include "ufs.h"
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#include "ufshci.h"
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#define UFSHCD "ufshcd"
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#define UFSHCD_DRIVER_VERSION "0.2"
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struct ufs_hba;
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enum dev_cmd_type {
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DEV_CMD_TYPE_NOP = 0x0,
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DEV_CMD_TYPE_QUERY = 0x1,
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};
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/**
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* struct uic_command - UIC command structure
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* @command: UIC command
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* @argument1: UIC command argument 1
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* @argument2: UIC command argument 2
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* @argument3: UIC command argument 3
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* @cmd_active: Indicate if UIC command is outstanding
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* @result: UIC command result
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* @done: UIC command completion
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*/
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struct uic_command {
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u32 command;
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u32 argument1;
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u32 argument2;
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u32 argument3;
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int cmd_active;
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int result;
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struct completion done;
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};
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/* Used to differentiate the power management options */
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enum ufs_pm_op {
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UFS_RUNTIME_PM,
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UFS_SYSTEM_PM,
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UFS_SHUTDOWN_PM,
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};
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#define ufshcd_is_runtime_pm(op) ((op) == UFS_RUNTIME_PM)
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#define ufshcd_is_system_pm(op) ((op) == UFS_SYSTEM_PM)
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#define ufshcd_is_shutdown_pm(op) ((op) == UFS_SHUTDOWN_PM)
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/* Host <-> Device UniPro Link state */
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enum uic_link_state {
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UIC_LINK_OFF_STATE = 0, /* Link powered down or disabled */
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UIC_LINK_ACTIVE_STATE = 1, /* Link is in Fast/Slow/Sleep state */
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UIC_LINK_HIBERN8_STATE = 2, /* Link is in Hibernate state */
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};
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#define ufshcd_is_link_off(hba) ((hba)->uic_link_state == UIC_LINK_OFF_STATE)
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#define ufshcd_is_link_active(hba) ((hba)->uic_link_state == \
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UIC_LINK_ACTIVE_STATE)
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#define ufshcd_is_link_hibern8(hba) ((hba)->uic_link_state == \
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UIC_LINK_HIBERN8_STATE)
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#define ufshcd_set_link_off(hba) ((hba)->uic_link_state = UIC_LINK_OFF_STATE)
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#define ufshcd_set_link_active(hba) ((hba)->uic_link_state = \
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UIC_LINK_ACTIVE_STATE)
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#define ufshcd_set_link_hibern8(hba) ((hba)->uic_link_state = \
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UIC_LINK_HIBERN8_STATE)
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/*
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* UFS Power management levels.
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* Each level is in increasing order of power savings.
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*/
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enum ufs_pm_level {
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UFS_PM_LVL_0, /* UFS_ACTIVE_PWR_MODE, UIC_LINK_ACTIVE_STATE */
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UFS_PM_LVL_1, /* UFS_ACTIVE_PWR_MODE, UIC_LINK_HIBERN8_STATE */
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UFS_PM_LVL_2, /* UFS_SLEEP_PWR_MODE, UIC_LINK_ACTIVE_STATE */
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UFS_PM_LVL_3, /* UFS_SLEEP_PWR_MODE, UIC_LINK_HIBERN8_STATE */
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UFS_PM_LVL_4, /* UFS_POWERDOWN_PWR_MODE, UIC_LINK_HIBERN8_STATE */
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UFS_PM_LVL_5, /* UFS_POWERDOWN_PWR_MODE, UIC_LINK_OFF_STATE */
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UFS_PM_LVL_MAX
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};
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struct ufs_pm_lvl_states {
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enum ufs_dev_pwr_mode dev_state;
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enum uic_link_state link_state;
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};
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/**
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* struct ufshcd_lrb - local reference block
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* @utr_descriptor_ptr: UTRD address of the command
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* @ucd_req_ptr: UCD address of the command
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* @ucd_rsp_ptr: Response UPIU address for this command
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* @ucd_prdt_ptr: PRDT address of the command
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* @cmd: pointer to SCSI command
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* @sense_buffer: pointer to sense buffer address of the SCSI command
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* @sense_bufflen: Length of the sense buffer
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* @scsi_status: SCSI status of the command
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* @command_type: SCSI, UFS, Query.
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* @task_tag: Task tag of the command
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* @lun: LUN of the command
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* @intr_cmd: Interrupt command (doesn't participate in interrupt aggregation)
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*/
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struct ufshcd_lrb {
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struct utp_transfer_req_desc *utr_descriptor_ptr;
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struct utp_upiu_req *ucd_req_ptr;
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struct utp_upiu_rsp *ucd_rsp_ptr;
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struct ufshcd_sg_entry *ucd_prdt_ptr;
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struct scsi_cmnd *cmd;
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u8 *sense_buffer;
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unsigned int sense_bufflen;
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int scsi_status;
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int command_type;
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int task_tag;
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u8 lun; /* UPIU LUN id field is only 8-bit wide */
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bool intr_cmd;
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};
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/**
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* struct ufs_query - holds relevent data structures for query request
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* @request: request upiu and function
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* @descriptor: buffer for sending/receiving descriptor
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* @response: response upiu and response
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*/
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struct ufs_query {
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struct ufs_query_req request;
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u8 *descriptor;
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struct ufs_query_res response;
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};
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/**
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* struct ufs_dev_cmd - all assosiated fields with device management commands
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* @type: device management command type - Query, NOP OUT
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* @lock: lock to allow one command at a time
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* @complete: internal commands completion
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* @tag_wq: wait queue until free command slot is available
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*/
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struct ufs_dev_cmd {
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enum dev_cmd_type type;
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struct mutex lock;
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struct completion *complete;
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wait_queue_head_t tag_wq;
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struct ufs_query query;
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};
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/**
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* struct ufs_clk_info - UFS clock related info
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* @list: list headed by hba->clk_list_head
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* @clk: clock node
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* @name: clock name
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* @max_freq: maximum frequency supported by the clock
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* @min_freq: min frequency that can be used for clock scaling
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* @curr_freq: indicates the current frequency that it is set to
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* @enabled: variable to check against multiple enable/disable
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*/
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struct ufs_clk_info {
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struct list_head list;
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struct clk *clk;
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const char *name;
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u32 max_freq;
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u32 min_freq;
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u32 curr_freq;
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bool enabled;
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};
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#define PRE_CHANGE 0
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#define POST_CHANGE 1
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struct ufs_pa_layer_attr {
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u32 gear_rx;
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u32 gear_tx;
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u32 lane_rx;
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u32 lane_tx;
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u32 pwr_rx;
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u32 pwr_tx;
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u32 hs_rate;
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};
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struct ufs_pwr_mode_info {
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bool is_valid;
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struct ufs_pa_layer_attr info;
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};
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/**
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* struct ufs_hba_variant_ops - variant specific callbacks
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* @name: variant name
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* @init: called when the driver is initialized
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* @exit: called to cleanup everything done in init
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* @get_ufs_hci_version: called to get UFS HCI version
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* @clk_scale_notify: notifies that clks are scaled up/down
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* @setup_clocks: called before touching any of the controller registers
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* @setup_regulators: called before accessing the host controller
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* @hce_enable_notify: called before and after HCE enable bit is set to allow
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* variant specific Uni-Pro initialization.
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* @link_startup_notify: called before and after Link startup is carried out
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* to allow variant specific Uni-Pro initialization.
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* @pwr_change_notify: called before and after a power mode change
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* is carried out to allow vendor spesific capabilities
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* to be set.
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* @suspend: called during host controller PM callback
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* @resume: called during host controller PM callback
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*/
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struct ufs_hba_variant_ops {
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const char *name;
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int (*init)(struct ufs_hba *);
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void (*exit)(struct ufs_hba *);
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u32 (*get_ufs_hci_version)(struct ufs_hba *);
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void (*clk_scale_notify)(struct ufs_hba *);
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int (*setup_clocks)(struct ufs_hba *, bool);
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int (*setup_regulators)(struct ufs_hba *, bool);
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int (*hce_enable_notify)(struct ufs_hba *, bool);
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int (*link_startup_notify)(struct ufs_hba *, bool);
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int (*pwr_change_notify)(struct ufs_hba *,
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bool, struct ufs_pa_layer_attr *,
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struct ufs_pa_layer_attr *);
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int (*suspend)(struct ufs_hba *, enum ufs_pm_op);
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int (*resume)(struct ufs_hba *, enum ufs_pm_op);
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};
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/* clock gating state */
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enum clk_gating_state {
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CLKS_OFF,
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CLKS_ON,
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REQ_CLKS_OFF,
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REQ_CLKS_ON,
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};
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/**
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* struct ufs_clk_gating - UFS clock gating related info
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* @gate_work: worker to turn off clocks after some delay as specified in
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* delay_ms
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* @ungate_work: worker to turn on clocks that will be used in case of
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* interrupt context
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* @state: the current clocks state
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* @delay_ms: gating delay in ms
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* @is_suspended: clk gating is suspended when set to 1 which can be used
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* during suspend/resume
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* @delay_attr: sysfs attribute to control delay_attr
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* @active_reqs: number of requests that are pending and should be waited for
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* completion before gating clocks.
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*/
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struct ufs_clk_gating {
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struct delayed_work gate_work;
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struct work_struct ungate_work;
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enum clk_gating_state state;
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unsigned long delay_ms;
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bool is_suspended;
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struct device_attribute delay_attr;
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int active_reqs;
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};
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struct ufs_clk_scaling {
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ktime_t busy_start_t;
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bool is_busy_started;
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unsigned long tot_busy_t;
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unsigned long window_start_t;
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};
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/**
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* struct ufs_init_prefetch - contains data that is pre-fetched once during
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* initialization
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* @icc_level: icc level which was read during initialization
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*/
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struct ufs_init_prefetch {
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u32 icc_level;
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};
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/**
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* struct ufs_hba - per adapter private structure
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* @mmio_base: UFSHCI base register address
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* @ucdl_base_addr: UFS Command Descriptor base address
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* @utrdl_base_addr: UTP Transfer Request Descriptor base address
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* @utmrdl_base_addr: UTP Task Management Descriptor base address
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* @ucdl_dma_addr: UFS Command Descriptor DMA address
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* @utrdl_dma_addr: UTRDL DMA address
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* @utmrdl_dma_addr: UTMRDL DMA address
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* @host: Scsi_Host instance of the driver
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* @dev: device handle
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* @lrb: local reference block
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* @lrb_in_use: lrb in use
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* @outstanding_tasks: Bits representing outstanding task requests
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* @outstanding_reqs: Bits representing outstanding transfer requests
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* @capabilities: UFS Controller Capabilities
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* @nutrs: Transfer Request Queue depth supported by controller
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* @nutmrs: Task Management Queue depth supported by controller
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* @ufs_version: UFS Version to which controller complies
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* @vops: pointer to variant specific operations
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* @priv: pointer to variant specific private data
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* @irq: Irq number of the controller
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* @active_uic_cmd: handle of active UIC command
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* @uic_cmd_mutex: mutex for uic command
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* @tm_wq: wait queue for task management
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* @tm_tag_wq: wait queue for free task management slots
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* @tm_slots_in_use: bit map of task management request slots in use
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* @pwr_done: completion for power mode change
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* @tm_condition: condition variable for task management
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* @ufshcd_state: UFSHCD states
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* @eh_flags: Error handling flags
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* @intr_mask: Interrupt Mask Bits
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* @ee_ctrl_mask: Exception event control mask
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* @is_powered: flag to check if HBA is powered
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* @is_init_prefetch: flag to check if data was pre-fetched in initialization
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* @init_prefetch_data: data pre-fetched during initialization
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* @eh_work: Worker to handle UFS errors that require s/w attention
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* @eeh_work: Worker to handle exception events
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* @errors: HBA errors
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* @uic_error: UFS interconnect layer error status
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* @saved_err: sticky error mask
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* @saved_uic_err: sticky UIC error mask
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* @dev_cmd: ufs device management command information
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* @last_dme_cmd_tstamp: time stamp of the last completed DME command
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* @auto_bkops_enabled: to track whether bkops is enabled in device
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* @vreg_info: UFS device voltage regulator information
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* @clk_list_head: UFS host controller clocks list node head
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* @pwr_info: holds current power mode
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* @max_pwr_info: keeps the device max valid pwm
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*/
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struct ufs_hba {
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void __iomem *mmio_base;
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/* Virtual memory reference */
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struct utp_transfer_cmd_desc *ucdl_base_addr;
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struct utp_transfer_req_desc *utrdl_base_addr;
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struct utp_task_req_desc *utmrdl_base_addr;
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/* DMA memory reference */
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dma_addr_t ucdl_dma_addr;
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dma_addr_t utrdl_dma_addr;
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dma_addr_t utmrdl_dma_addr;
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struct Scsi_Host *host;
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struct device *dev;
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/*
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* This field is to keep a reference to "scsi_device" corresponding to
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* "UFS device" W-LU.
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*/
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struct scsi_device *sdev_ufs_device;
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enum ufs_dev_pwr_mode curr_dev_pwr_mode;
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enum uic_link_state uic_link_state;
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/* Desired UFS power management level during runtime PM */
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enum ufs_pm_level rpm_lvl;
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/* Desired UFS power management level during system PM */
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enum ufs_pm_level spm_lvl;
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int pm_op_in_progress;
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struct ufshcd_lrb *lrb;
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unsigned long lrb_in_use;
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unsigned long outstanding_tasks;
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unsigned long outstanding_reqs;
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u32 capabilities;
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int nutrs;
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int nutmrs;
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u32 ufs_version;
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struct ufs_hba_variant_ops *vops;
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void *priv;
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unsigned int irq;
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bool is_irq_enabled;
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/* Interrupt aggregation support is broken */
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#define UFSHCD_QUIRK_BROKEN_INTR_AGGR UFS_BIT(0)
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/*
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* delay before each dme command is required as the unipro
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* layer has shown instabilities
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*/
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#define UFSHCD_QUIRK_DELAY_BEFORE_DME_CMDS UFS_BIT(1)
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/*
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* If UFS host controller is having issue in processing LCC (Line
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* Control Command) coming from device then enable this quirk.
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* When this quirk is enabled, host controller driver should disable
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* the LCC transmission on UFS device (by clearing TX_LCC_ENABLE
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* attribute of device to 0).
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*/
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#define UFSHCD_QUIRK_BROKEN_LCC UFS_BIT(2)
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/*
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* The attribute PA_RXHSUNTERMCAP specifies whether or not the
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* inbound Link supports unterminated line in HS mode. Setting this
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* attribute to 1 fixes moving to HS gear.
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*/
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#define UFSHCD_QUIRK_BROKEN_PA_RXHSUNTERMCAP UFS_BIT(3)
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/*
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* This quirk needs to be enabled if the host contoller only allows
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* accessing the peer dme attributes in AUTO mode (FAST AUTO or
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* SLOW AUTO).
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*/
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#define UFSHCD_QUIRK_DME_PEER_ACCESS_AUTO_MODE UFS_BIT(4)
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/*
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* This quirk needs to be enabled if the host contoller doesn't
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* advertise the correct version in UFS_VER register. If this quirk
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* is enabled, standard UFS host driver will call the vendor specific
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* ops (get_ufs_hci_version) to get the correct version.
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*/
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#define UFSHCD_QUIRK_BROKEN_UFS_HCI_VERSION UFS_BIT(5)
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unsigned int quirks; /* Deviations from standard UFSHCI spec. */
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wait_queue_head_t tm_wq;
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wait_queue_head_t tm_tag_wq;
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unsigned long tm_condition;
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unsigned long tm_slots_in_use;
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|
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struct uic_command *active_uic_cmd;
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struct mutex uic_cmd_mutex;
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struct completion *uic_async_done;
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u32 ufshcd_state;
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u32 eh_flags;
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u32 intr_mask;
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u16 ee_ctrl_mask;
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bool is_powered;
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bool is_init_prefetch;
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struct ufs_init_prefetch init_prefetch_data;
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|
|
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/* Work Queues */
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struct work_struct eh_work;
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struct work_struct eeh_work;
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|
|
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/* HBA Errors */
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u32 errors;
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|
u32 uic_error;
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|
u32 saved_err;
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|
u32 saved_uic_err;
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|
|
|
/* Device management request data */
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|
struct ufs_dev_cmd dev_cmd;
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|
ktime_t last_dme_cmd_tstamp;
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|
|
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/* Keeps information of the UFS device connected to this host */
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struct ufs_dev_info dev_info;
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|
bool auto_bkops_enabled;
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struct ufs_vreg_info vreg_info;
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struct list_head clk_list_head;
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|
|
|
bool wlun_dev_clr_ua;
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|
|
|
struct ufs_pa_layer_attr pwr_info;
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|
struct ufs_pwr_mode_info max_pwr_info;
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|
|
|
struct ufs_clk_gating clk_gating;
|
|
/* Control to enable/disable host capabilities */
|
|
u32 caps;
|
|
/* Allow dynamic clk gating */
|
|
#define UFSHCD_CAP_CLK_GATING (1 << 0)
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|
/* Allow hiberb8 with clk gating */
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|
#define UFSHCD_CAP_HIBERN8_WITH_CLK_GATING (1 << 1)
|
|
/* Allow dynamic clk scaling */
|
|
#define UFSHCD_CAP_CLK_SCALING (1 << 2)
|
|
/* Allow auto bkops to enabled during runtime suspend */
|
|
#define UFSHCD_CAP_AUTO_BKOPS_SUSPEND (1 << 3)
|
|
/*
|
|
* This capability allows host controller driver to use the UFS HCI's
|
|
* interrupt aggregation capability.
|
|
* CAUTION: Enabling this might reduce overall UFS throughput.
|
|
*/
|
|
#define UFSHCD_CAP_INTR_AGGR (1 << 4)
|
|
|
|
struct devfreq *devfreq;
|
|
struct ufs_clk_scaling clk_scaling;
|
|
bool is_sys_suspended;
|
|
};
|
|
|
|
/* Returns true if clocks can be gated. Otherwise false */
|
|
static inline bool ufshcd_is_clkgating_allowed(struct ufs_hba *hba)
|
|
{
|
|
return hba->caps & UFSHCD_CAP_CLK_GATING;
|
|
}
|
|
static inline bool ufshcd_can_hibern8_during_gating(struct ufs_hba *hba)
|
|
{
|
|
return hba->caps & UFSHCD_CAP_HIBERN8_WITH_CLK_GATING;
|
|
}
|
|
static inline int ufshcd_is_clkscaling_enabled(struct ufs_hba *hba)
|
|
{
|
|
return hba->caps & UFSHCD_CAP_CLK_SCALING;
|
|
}
|
|
static inline bool ufshcd_can_autobkops_during_suspend(struct ufs_hba *hba)
|
|
{
|
|
return hba->caps & UFSHCD_CAP_AUTO_BKOPS_SUSPEND;
|
|
}
|
|
|
|
static inline bool ufshcd_is_intr_aggr_allowed(struct ufs_hba *hba)
|
|
{
|
|
if ((hba->caps & UFSHCD_CAP_INTR_AGGR) &&
|
|
!(hba->quirks & UFSHCD_QUIRK_BROKEN_INTR_AGGR))
|
|
return true;
|
|
else
|
|
return false;
|
|
}
|
|
|
|
#define ufshcd_writel(hba, val, reg) \
|
|
writel((val), (hba)->mmio_base + (reg))
|
|
#define ufshcd_readl(hba, reg) \
|
|
readl((hba)->mmio_base + (reg))
|
|
|
|
/**
|
|
* ufshcd_rmwl - read modify write into a register
|
|
* @hba - per adapter instance
|
|
* @mask - mask to apply on read value
|
|
* @val - actual value to write
|
|
* @reg - register address
|
|
*/
|
|
static inline void ufshcd_rmwl(struct ufs_hba *hba, u32 mask, u32 val, u32 reg)
|
|
{
|
|
u32 tmp;
|
|
|
|
tmp = ufshcd_readl(hba, reg);
|
|
tmp &= ~mask;
|
|
tmp |= (val & mask);
|
|
ufshcd_writel(hba, tmp, reg);
|
|
}
|
|
|
|
int ufshcd_alloc_host(struct device *, struct ufs_hba **);
|
|
int ufshcd_init(struct ufs_hba * , void __iomem * , unsigned int);
|
|
void ufshcd_remove(struct ufs_hba *);
|
|
|
|
/**
|
|
* ufshcd_hba_stop - Send controller to reset state
|
|
* @hba: per adapter instance
|
|
*/
|
|
static inline void ufshcd_hba_stop(struct ufs_hba *hba)
|
|
{
|
|
ufshcd_writel(hba, CONTROLLER_DISABLE, REG_CONTROLLER_ENABLE);
|
|
}
|
|
|
|
static inline void check_upiu_size(void)
|
|
{
|
|
BUILD_BUG_ON(ALIGNED_UPIU_SIZE <
|
|
GENERAL_UPIU_REQUEST_SIZE + QUERY_DESC_MAX_SIZE);
|
|
}
|
|
|
|
extern int ufshcd_runtime_suspend(struct ufs_hba *hba);
|
|
extern int ufshcd_runtime_resume(struct ufs_hba *hba);
|
|
extern int ufshcd_runtime_idle(struct ufs_hba *hba);
|
|
extern int ufshcd_system_suspend(struct ufs_hba *hba);
|
|
extern int ufshcd_system_resume(struct ufs_hba *hba);
|
|
extern int ufshcd_shutdown(struct ufs_hba *hba);
|
|
extern int ufshcd_dme_set_attr(struct ufs_hba *hba, u32 attr_sel,
|
|
u8 attr_set, u32 mib_val, u8 peer);
|
|
extern int ufshcd_dme_get_attr(struct ufs_hba *hba, u32 attr_sel,
|
|
u32 *mib_val, u8 peer);
|
|
|
|
/* UIC command interfaces for DME primitives */
|
|
#define DME_LOCAL 0
|
|
#define DME_PEER 1
|
|
#define ATTR_SET_NOR 0 /* NORMAL */
|
|
#define ATTR_SET_ST 1 /* STATIC */
|
|
|
|
static inline int ufshcd_dme_set(struct ufs_hba *hba, u32 attr_sel,
|
|
u32 mib_val)
|
|
{
|
|
return ufshcd_dme_set_attr(hba, attr_sel, ATTR_SET_NOR,
|
|
mib_val, DME_LOCAL);
|
|
}
|
|
|
|
static inline int ufshcd_dme_st_set(struct ufs_hba *hba, u32 attr_sel,
|
|
u32 mib_val)
|
|
{
|
|
return ufshcd_dme_set_attr(hba, attr_sel, ATTR_SET_ST,
|
|
mib_val, DME_LOCAL);
|
|
}
|
|
|
|
static inline int ufshcd_dme_peer_set(struct ufs_hba *hba, u32 attr_sel,
|
|
u32 mib_val)
|
|
{
|
|
return ufshcd_dme_set_attr(hba, attr_sel, ATTR_SET_NOR,
|
|
mib_val, DME_PEER);
|
|
}
|
|
|
|
static inline int ufshcd_dme_peer_st_set(struct ufs_hba *hba, u32 attr_sel,
|
|
u32 mib_val)
|
|
{
|
|
return ufshcd_dme_set_attr(hba, attr_sel, ATTR_SET_ST,
|
|
mib_val, DME_PEER);
|
|
}
|
|
|
|
static inline int ufshcd_dme_get(struct ufs_hba *hba,
|
|
u32 attr_sel, u32 *mib_val)
|
|
{
|
|
return ufshcd_dme_get_attr(hba, attr_sel, mib_val, DME_LOCAL);
|
|
}
|
|
|
|
static inline int ufshcd_dme_peer_get(struct ufs_hba *hba,
|
|
u32 attr_sel, u32 *mib_val)
|
|
{
|
|
return ufshcd_dme_get_attr(hba, attr_sel, mib_val, DME_PEER);
|
|
}
|
|
|
|
int ufshcd_hold(struct ufs_hba *hba, bool async);
|
|
void ufshcd_release(struct ufs_hba *hba);
|
|
#endif /* End of Header */
|