mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-28 11:18:45 +07:00
58cf279aca
Infrastructural changes: - In struct gpio_chip, rename the .dev node to .parent to better reflect the fact that this is not the GPIO struct device abstraction. We will add that soon so this would be totallt confusing. - It was noted that the driver .get_value() callbacks was sometimes reporting negative -ERR values to the gpiolib core, expecting them to be propagated to consumer gpiod_get_value() and gpio_get_value() calls. This was not happening, so as there was a mess of drivers returning negative errors and some returning "anything else than zero" to indicate that a line was active. As some would have bit 31 set to indicate "line active" it clashed with negative error codes. This is fixed by the largeish series clamping values in all drivers with !!value to [0,1] and then augmenting the code to propagate error codes to consumers. (Includes some ACKed patches in other subsystems.) - Add a void *data pointer to struct gpio_chip. The container_of() design pattern is indeed very nice, but we want to reform the struct gpio_chip to be a non-volative, stateless business, and keep states internal to the gpiolib to be able to hold on to the state when adding a proper userspace ABI (character device) further down the road. To achieve this, drivers need a handle at the internal state that is not dependent on their struct gpio_chip() so we add gpiochip_add_data() and gpiochip_get_data() following the pattern of many other subsystems. All the "use gpiochip data pointer" patches transforms drivers to this scheme. - The Generic GPIO chip header has been merged into the general <linux/gpio/driver.h> header, and the custom header for that removed. Instead of having a separate mm_gpio_chip struct for these generic drivers, merge that into struct gpio_chip, simplifying the code and removing the need for separate and confusing includes. Misc improvements: - Stabilize the way GPIOs are looked up from the ACPI legacy specification. - Incremental driver features for PXA, PCA953X, Lantiq (patches from the OpenWRT community), RCAR, Zynq, PL061, 104-idi-48 New drivers: - Add a GPIO chip to the ALSA SoC AC97 driver. - Add a new Broadcom NSP SoC driver (this lands in the pinctrl dir, but the branch is merged here too to account for infrastructural changes). - The sx150x driver now supports the sx1502. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJWmsZhAAoJEEEQszewGV1ztq0QAJ1KbNOpmf/s3INkOH4r771Z WIrNEsmwwLIAryo8gKNOM0H1zCwhRUV7hIE5jYWgD6JvjuAN6vobMlZAq21j6YpB pKgqnI5DuoND450xjb8wSwGQ5NTYp1rFXNmwCrtyTjOle6AAW+Kp2cvVWxVr77Av uJinRuuBr9GOKW/yYM1Fw/6EPjkvvhVOb+LBguRyVvq0s5Peyw7ZVeY1tjgPHJLn oSZ9dmPUjHEn91oZQbtfro3plOObcxdgJ8vo//pgEmyhMeR8XjXES+aUfErxqWOU PimrZuMMy4cxnsqWwh3Dyxo7KSWfJKfSPRwnGwc/HgbHZEoWxOZI1ezRtGKrRQtj vubxp5dUBA5z66TMsOCeJtzKVSofkvgX2Wr/Y9jKp5oy9cHdAZv9+jEHV1pr6asz Tas97MmmO77XuRI/GPDqVHx8dfa15OIz9s92+Gu64KxNzVxTo4+NdoPSNxkbCILO FKn7EmU3D0OjmN2NJ9GAURoFaj3BBUgNhaxacG9j2bieyh+euuUHRtyh2k8zXR9y 8OnY1UOrTUYF8YIq9pXZxMQRD/lqwCNHvEjtI6BqMcNx4MptfTL+FKYUkn/SgCYk QTNV6Ui+ety5D5aEpp5q0ItGsrDJ2LYSItsS+cOtMy2ieOxbQav9NWwu7eI3l5ly gwYTZjG9p9joPXLW0E3g =63rR -----END PGP SIGNATURE----- Merge tag 'gpio-v4.5-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio Pull GPIO updates from Linus Walleij: "Here is the bulk of GPIO changes for v4.5. Notably there are big refactorings mostly by myself, aimed at getting the gpio_chip into a shape that makes me believe I can proceed to preserve state for a proper userspace ABI (character device) that has already been proposed once, but resulted in the feedback that I need to go back and restructure stuff. So I've been restructuring stuff. On the way I ran into brokenness (return code from the get_value() callback) and had to fix it. Also, refactored generic GPIO to be simpler. Some of that is still waiting to trickle down from the subsystems all over the kernel that provide random gpio_chips, I've touched every single GPIO driver in the kernel now, oh man I didn't know I was responsible for so much... Apart from that we're churning along as usual. I took some effort to test and retest so it should merge nicely and we shook out a couple of bugs in -next. Infrastructural changes: - In struct gpio_chip, rename the .dev node to .parent to better reflect the fact that this is not the GPIO struct device abstraction. We will add that soon so this would be totallt confusing. - It was noted that the driver .get_value() callbacks was sometimes reporting negative -ERR values to the gpiolib core, expecting them to be propagated to consumer gpiod_get_value() and gpio_get_value() calls. This was not happening, so as there was a mess of drivers returning negative errors and some returning "anything else than zero" to indicate that a line was active. As some would have bit 31 set to indicate "line active" it clashed with negative error codes. This is fixed by the largeish series clamping values in all drivers with !!value to [0,1] and then augmenting the code to propagate error codes to consumers. (Includes some ACKed patches in other subsystems.) - Add a void *data pointer to struct gpio_chip. The container_of() design pattern is indeed very nice, but we want to reform the struct gpio_chip to be a non-volative, stateless business, and keep states internal to the gpiolib to be able to hold on to the state when adding a proper userspace ABI (character device) further down the road. To achieve this, drivers need a handle at the internal state that is not dependent on their struct gpio_chip() so we add gpiochip_add_data() and gpiochip_get_data() following the pattern of many other subsystems. All the "use gpiochip data pointer" patches transforms drivers to this scheme. - The Generic GPIO chip header has been merged into the general <linux/gpio/driver.h> header, and the custom header for that removed. Instead of having a separate mm_gpio_chip struct for these generic drivers, merge that into struct gpio_chip, simplifying the code and removing the need for separate and confusing includes. Misc improvements: - Stabilize the way GPIOs are looked up from the ACPI legacy specification. - Incremental driver features for PXA, PCA953X, Lantiq (patches from the OpenWRT community), RCAR, Zynq, PL061, 104-idi-48 New drivers: - Add a GPIO chip to the ALSA SoC AC97 driver. - Add a new Broadcom NSP SoC driver (this lands in the pinctrl dir, but the branch is merged here too to account for infrastructural changes). - The sx150x driver now supports the sx1502" * tag 'gpio-v4.5-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio: (220 commits) gpio: generic: make bgpio_pdata always visible gpiolib: fix chip order in gpio list gpio: mpc8xxx: Do not use gpiochip_get_data() in mpc8xxx_gpio_save_regs() gpio: mm-lantiq: Do not use gpiochip_get_data() in ltq_mm_save_regs() gpio: brcmstb: Allow building driver for BMIPS_GENERIC gpio: brcmstb: Set endian flags for big-endian MIPS gpio: moxart: fix build regression gpio: xilinx: Do not use gpiochip_get_data() in xgpio_save_regs() leds: pca9532: use gpiochip data pointer leds: tca6507: use gpiochip data pointer hid: cp2112: use gpiochip data pointer bcma: gpio: use gpiochip data pointer avr32: gpio: use gpiochip data pointer video: fbdev: via: use gpiochip data pointer gpio: pch: Optimize pch_gpio_get() Revert "pinctrl: lantiq: Implement gpio_chip.to_irq" pinctrl: nsp-gpio: use gpiochip data pointer pinctrl: vt8500-wmt: use gpiochip data pointer pinctrl: exynos5440: use gpiochip data pointer pinctrl: at91-pio4: use gpiochip data pointer ...
890 lines
21 KiB
C
890 lines
21 KiB
C
/*
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* Copyright (c) 2015, Sony Mobile Communications AB.
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* Copyright (c) 2013, The Linux Foundation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 and
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* only version 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <linux/module.h>
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#include <linux/platform_device.h>
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#include <linux/pinctrl/pinctrl.h>
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#include <linux/pinctrl/pinmux.h>
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#include <linux/pinctrl/pinconf.h>
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#include <linux/pinctrl/pinconf-generic.h>
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#include <linux/slab.h>
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#include <linux/regmap.h>
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#include <linux/gpio.h>
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#include <linux/interrupt.h>
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#include <linux/of_device.h>
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#include <linux/of_irq.h>
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#include <dt-bindings/pinctrl/qcom,pmic-mpp.h>
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#include "../core.h"
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#include "../pinctrl-utils.h"
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/* MPP registers */
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#define SSBI_REG_ADDR_MPP_BASE 0x50
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#define SSBI_REG_ADDR_MPP(n) (SSBI_REG_ADDR_MPP_BASE + n)
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/* MPP Type: type */
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#define PM8XXX_MPP_TYPE_D_INPUT 0
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#define PM8XXX_MPP_TYPE_D_OUTPUT 1
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#define PM8XXX_MPP_TYPE_D_BI_DIR 2
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#define PM8XXX_MPP_TYPE_A_INPUT 3
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#define PM8XXX_MPP_TYPE_A_OUTPUT 4
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#define PM8XXX_MPP_TYPE_SINK 5
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#define PM8XXX_MPP_TYPE_DTEST_SINK 6
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#define PM8XXX_MPP_TYPE_DTEST_OUTPUT 7
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/* Digital Input: control */
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#define PM8XXX_MPP_DIN_TO_INT 0
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#define PM8XXX_MPP_DIN_TO_DBUS1 1
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#define PM8XXX_MPP_DIN_TO_DBUS2 2
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#define PM8XXX_MPP_DIN_TO_DBUS3 3
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/* Digital Output: control */
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#define PM8XXX_MPP_DOUT_CTRL_LOW 0
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#define PM8XXX_MPP_DOUT_CTRL_HIGH 1
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#define PM8XXX_MPP_DOUT_CTRL_MPP 2
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#define PM8XXX_MPP_DOUT_CTRL_INV_MPP 3
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/* Bidirectional: control */
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#define PM8XXX_MPP_BI_PULLUP_1KOHM 0
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#define PM8XXX_MPP_BI_PULLUP_OPEN 1
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#define PM8XXX_MPP_BI_PULLUP_10KOHM 2
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#define PM8XXX_MPP_BI_PULLUP_30KOHM 3
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/* Analog Output: control */
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#define PM8XXX_MPP_AOUT_CTRL_DISABLE 0
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#define PM8XXX_MPP_AOUT_CTRL_ENABLE 1
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#define PM8XXX_MPP_AOUT_CTRL_MPP_HIGH_EN 2
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#define PM8XXX_MPP_AOUT_CTRL_MPP_LOW_EN 3
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/* Current Sink: control */
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#define PM8XXX_MPP_CS_CTRL_DISABLE 0
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#define PM8XXX_MPP_CS_CTRL_ENABLE 1
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#define PM8XXX_MPP_CS_CTRL_MPP_HIGH_EN 2
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#define PM8XXX_MPP_CS_CTRL_MPP_LOW_EN 3
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/* DTEST Current Sink: control */
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#define PM8XXX_MPP_DTEST_CS_CTRL_EN1 0
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#define PM8XXX_MPP_DTEST_CS_CTRL_EN2 1
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#define PM8XXX_MPP_DTEST_CS_CTRL_EN3 2
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#define PM8XXX_MPP_DTEST_CS_CTRL_EN4 3
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/* DTEST Digital Output: control */
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#define PM8XXX_MPP_DTEST_DBUS1 0
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#define PM8XXX_MPP_DTEST_DBUS2 1
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#define PM8XXX_MPP_DTEST_DBUS3 2
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#define PM8XXX_MPP_DTEST_DBUS4 3
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/* custom pinconf parameters */
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#define PM8XXX_CONFIG_AMUX (PIN_CONFIG_END + 1)
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#define PM8XXX_CONFIG_DTEST_SELECTOR (PIN_CONFIG_END + 2)
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#define PM8XXX_CONFIG_ALEVEL (PIN_CONFIG_END + 3)
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#define PM8XXX_CONFIG_PAIRED (PIN_CONFIG_END + 4)
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/**
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* struct pm8xxx_pin_data - dynamic configuration for a pin
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* @reg: address of the control register
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* @irq: IRQ from the PMIC interrupt controller
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* @mode: operating mode for the pin (digital, analog or current sink)
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* @input: pin is input
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* @output: pin is output
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* @high_z: pin is floating
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* @paired: mpp operates in paired mode
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* @output_value: logical output value of the mpp
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* @power_source: selected power source
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* @dtest: DTEST route selector
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* @amux: input muxing in analog mode
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* @aout_level: selector of the output in analog mode
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* @drive_strength: drive strength of the current sink
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* @pullup: pull up value, when in digital bidirectional mode
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*/
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struct pm8xxx_pin_data {
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unsigned reg;
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int irq;
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u8 mode;
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bool input;
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bool output;
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bool high_z;
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bool paired;
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bool output_value;
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u8 power_source;
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u8 dtest;
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u8 amux;
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u8 aout_level;
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u8 drive_strength;
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unsigned pullup;
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};
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struct pm8xxx_mpp {
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struct device *dev;
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struct regmap *regmap;
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struct pinctrl_dev *pctrl;
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struct gpio_chip chip;
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struct pinctrl_desc desc;
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unsigned npins;
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};
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static const struct pinconf_generic_params pm8xxx_mpp_bindings[] = {
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{"qcom,amux-route", PM8XXX_CONFIG_AMUX, 0},
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{"qcom,analog-level", PM8XXX_CONFIG_ALEVEL, 0},
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{"qcom,dtest", PM8XXX_CONFIG_DTEST_SELECTOR, 0},
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{"qcom,paired", PM8XXX_CONFIG_PAIRED, 0},
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};
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#ifdef CONFIG_DEBUG_FS
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static const struct pin_config_item pm8xxx_conf_items[] = {
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PCONFDUMP(PM8XXX_CONFIG_AMUX, "analog mux", NULL, true),
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PCONFDUMP(PM8XXX_CONFIG_ALEVEL, "analog level", NULL, true),
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PCONFDUMP(PM8XXX_CONFIG_DTEST_SELECTOR, "dtest", NULL, true),
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PCONFDUMP(PM8XXX_CONFIG_PAIRED, "paired", NULL, false),
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};
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#endif
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#define PM8XXX_MAX_MPPS 12
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static const char * const pm8xxx_groups[PM8XXX_MAX_MPPS] = {
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"mpp1", "mpp2", "mpp3", "mpp4", "mpp5", "mpp6", "mpp7", "mpp8",
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"mpp9", "mpp10", "mpp11", "mpp12",
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};
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#define PM8XXX_MPP_DIGITAL 0
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#define PM8XXX_MPP_ANALOG 1
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#define PM8XXX_MPP_SINK 2
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static const char * const pm8xxx_mpp_functions[] = {
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"digital", "analog", "sink",
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};
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static int pm8xxx_mpp_update(struct pm8xxx_mpp *pctrl,
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struct pm8xxx_pin_data *pin)
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{
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unsigned level;
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unsigned ctrl;
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unsigned type;
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int ret;
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u8 val;
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switch (pin->mode) {
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case PM8XXX_MPP_DIGITAL:
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if (pin->dtest) {
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type = PM8XXX_MPP_TYPE_DTEST_OUTPUT;
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ctrl = pin->dtest - 1;
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} else if (pin->input && pin->output) {
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type = PM8XXX_MPP_TYPE_D_BI_DIR;
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if (pin->high_z)
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ctrl = PM8XXX_MPP_BI_PULLUP_OPEN;
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else if (pin->pullup == 600)
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ctrl = PM8XXX_MPP_BI_PULLUP_1KOHM;
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else if (pin->pullup == 10000)
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ctrl = PM8XXX_MPP_BI_PULLUP_10KOHM;
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else
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ctrl = PM8XXX_MPP_BI_PULLUP_30KOHM;
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} else if (pin->input) {
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type = PM8XXX_MPP_TYPE_D_INPUT;
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if (pin->dtest)
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ctrl = pin->dtest;
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else
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ctrl = PM8XXX_MPP_DIN_TO_INT;
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} else {
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type = PM8XXX_MPP_TYPE_D_OUTPUT;
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ctrl = !!pin->output_value;
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if (pin->paired)
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ctrl |= BIT(1);
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}
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level = pin->power_source;
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break;
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case PM8XXX_MPP_ANALOG:
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if (pin->output) {
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type = PM8XXX_MPP_TYPE_A_OUTPUT;
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level = pin->aout_level;
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ctrl = pin->output_value;
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if (pin->paired)
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ctrl |= BIT(1);
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} else {
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type = PM8XXX_MPP_TYPE_A_INPUT;
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level = pin->amux;
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ctrl = 0;
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}
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break;
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case PM8XXX_MPP_SINK:
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level = (pin->drive_strength / 5) - 1;
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if (pin->dtest) {
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type = PM8XXX_MPP_TYPE_DTEST_SINK;
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ctrl = pin->dtest - 1;
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} else {
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type = PM8XXX_MPP_TYPE_SINK;
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ctrl = pin->output_value;
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if (pin->paired)
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ctrl |= BIT(1);
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}
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break;
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default:
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return -EINVAL;
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}
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val = type << 5 | level << 2 | ctrl;
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ret = regmap_write(pctrl->regmap, pin->reg, val);
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if (ret)
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dev_err(pctrl->dev, "failed to write register\n");
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return ret;
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}
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static int pm8xxx_get_groups_count(struct pinctrl_dev *pctldev)
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{
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struct pm8xxx_mpp *pctrl = pinctrl_dev_get_drvdata(pctldev);
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return pctrl->npins;
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}
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static const char *pm8xxx_get_group_name(struct pinctrl_dev *pctldev,
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unsigned group)
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{
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return pm8xxx_groups[group];
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}
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static int pm8xxx_get_group_pins(struct pinctrl_dev *pctldev,
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unsigned group,
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const unsigned **pins,
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unsigned *num_pins)
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{
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struct pm8xxx_mpp *pctrl = pinctrl_dev_get_drvdata(pctldev);
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*pins = &pctrl->desc.pins[group].number;
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*num_pins = 1;
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return 0;
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}
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static const struct pinctrl_ops pm8xxx_pinctrl_ops = {
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.get_groups_count = pm8xxx_get_groups_count,
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.get_group_name = pm8xxx_get_group_name,
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.get_group_pins = pm8xxx_get_group_pins,
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.dt_node_to_map = pinconf_generic_dt_node_to_map_group,
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.dt_free_map = pinctrl_utils_dt_free_map,
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};
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static int pm8xxx_get_functions_count(struct pinctrl_dev *pctldev)
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{
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return ARRAY_SIZE(pm8xxx_mpp_functions);
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}
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static const char *pm8xxx_get_function_name(struct pinctrl_dev *pctldev,
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unsigned function)
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{
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return pm8xxx_mpp_functions[function];
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}
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static int pm8xxx_get_function_groups(struct pinctrl_dev *pctldev,
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unsigned function,
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const char * const **groups,
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unsigned * const num_groups)
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{
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struct pm8xxx_mpp *pctrl = pinctrl_dev_get_drvdata(pctldev);
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*groups = pm8xxx_groups;
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*num_groups = pctrl->npins;
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return 0;
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}
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static int pm8xxx_pinmux_set_mux(struct pinctrl_dev *pctldev,
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unsigned function,
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unsigned group)
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{
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struct pm8xxx_mpp *pctrl = pinctrl_dev_get_drvdata(pctldev);
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struct pm8xxx_pin_data *pin = pctrl->desc.pins[group].drv_data;
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pin->mode = function;
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pm8xxx_mpp_update(pctrl, pin);
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return 0;
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}
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static const struct pinmux_ops pm8xxx_pinmux_ops = {
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.get_functions_count = pm8xxx_get_functions_count,
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.get_function_name = pm8xxx_get_function_name,
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.get_function_groups = pm8xxx_get_function_groups,
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.set_mux = pm8xxx_pinmux_set_mux,
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};
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static int pm8xxx_pin_config_get(struct pinctrl_dev *pctldev,
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unsigned int offset,
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unsigned long *config)
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{
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struct pm8xxx_mpp *pctrl = pinctrl_dev_get_drvdata(pctldev);
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struct pm8xxx_pin_data *pin = pctrl->desc.pins[offset].drv_data;
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unsigned param = pinconf_to_config_param(*config);
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unsigned arg;
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|
|
switch (param) {
|
|
case PIN_CONFIG_BIAS_PULL_UP:
|
|
arg = pin->pullup;
|
|
break;
|
|
case PIN_CONFIG_BIAS_HIGH_IMPEDANCE:
|
|
arg = pin->high_z;
|
|
break;
|
|
case PIN_CONFIG_INPUT_ENABLE:
|
|
arg = pin->input;
|
|
break;
|
|
case PIN_CONFIG_OUTPUT:
|
|
arg = pin->output_value;
|
|
break;
|
|
case PIN_CONFIG_POWER_SOURCE:
|
|
arg = pin->power_source;
|
|
break;
|
|
case PIN_CONFIG_DRIVE_STRENGTH:
|
|
arg = pin->drive_strength;
|
|
break;
|
|
case PM8XXX_CONFIG_DTEST_SELECTOR:
|
|
arg = pin->dtest;
|
|
break;
|
|
case PM8XXX_CONFIG_AMUX:
|
|
arg = pin->amux;
|
|
break;
|
|
case PM8XXX_CONFIG_ALEVEL:
|
|
arg = pin->aout_level;
|
|
break;
|
|
case PM8XXX_CONFIG_PAIRED:
|
|
arg = pin->paired;
|
|
break;
|
|
default:
|
|
return -EINVAL;
|
|
}
|
|
|
|
*config = pinconf_to_config_packed(param, arg);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int pm8xxx_pin_config_set(struct pinctrl_dev *pctldev,
|
|
unsigned int offset,
|
|
unsigned long *configs,
|
|
unsigned num_configs)
|
|
{
|
|
struct pm8xxx_mpp *pctrl = pinctrl_dev_get_drvdata(pctldev);
|
|
struct pm8xxx_pin_data *pin = pctrl->desc.pins[offset].drv_data;
|
|
unsigned param;
|
|
unsigned arg;
|
|
unsigned i;
|
|
|
|
for (i = 0; i < num_configs; i++) {
|
|
param = pinconf_to_config_param(configs[i]);
|
|
arg = pinconf_to_config_argument(configs[i]);
|
|
|
|
switch (param) {
|
|
case PIN_CONFIG_BIAS_PULL_UP:
|
|
pin->pullup = arg;
|
|
break;
|
|
case PIN_CONFIG_BIAS_HIGH_IMPEDANCE:
|
|
pin->high_z = true;
|
|
break;
|
|
case PIN_CONFIG_INPUT_ENABLE:
|
|
pin->input = true;
|
|
break;
|
|
case PIN_CONFIG_OUTPUT:
|
|
pin->output = true;
|
|
pin->output_value = !!arg;
|
|
break;
|
|
case PIN_CONFIG_POWER_SOURCE:
|
|
pin->power_source = arg;
|
|
break;
|
|
case PIN_CONFIG_DRIVE_STRENGTH:
|
|
pin->drive_strength = arg;
|
|
break;
|
|
case PM8XXX_CONFIG_DTEST_SELECTOR:
|
|
pin->dtest = arg;
|
|
break;
|
|
case PM8XXX_CONFIG_AMUX:
|
|
pin->amux = arg;
|
|
break;
|
|
case PM8XXX_CONFIG_ALEVEL:
|
|
pin->aout_level = arg;
|
|
break;
|
|
case PM8XXX_CONFIG_PAIRED:
|
|
pin->paired = !!arg;
|
|
break;
|
|
default:
|
|
dev_err(pctrl->dev,
|
|
"unsupported config parameter: %x\n",
|
|
param);
|
|
return -EINVAL;
|
|
}
|
|
}
|
|
|
|
pm8xxx_mpp_update(pctrl, pin);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static const struct pinconf_ops pm8xxx_pinconf_ops = {
|
|
.is_generic = true,
|
|
.pin_config_group_get = pm8xxx_pin_config_get,
|
|
.pin_config_group_set = pm8xxx_pin_config_set,
|
|
};
|
|
|
|
static struct pinctrl_desc pm8xxx_pinctrl_desc = {
|
|
.name = "pm8xxx_mpp",
|
|
.pctlops = &pm8xxx_pinctrl_ops,
|
|
.pmxops = &pm8xxx_pinmux_ops,
|
|
.confops = &pm8xxx_pinconf_ops,
|
|
.owner = THIS_MODULE,
|
|
};
|
|
|
|
static int pm8xxx_mpp_direction_input(struct gpio_chip *chip,
|
|
unsigned offset)
|
|
{
|
|
struct pm8xxx_mpp *pctrl = gpiochip_get_data(chip);
|
|
struct pm8xxx_pin_data *pin = pctrl->desc.pins[offset].drv_data;
|
|
|
|
switch (pin->mode) {
|
|
case PM8XXX_MPP_DIGITAL:
|
|
pin->input = true;
|
|
break;
|
|
case PM8XXX_MPP_ANALOG:
|
|
pin->input = true;
|
|
pin->output = true;
|
|
break;
|
|
case PM8XXX_MPP_SINK:
|
|
return -EINVAL;
|
|
}
|
|
|
|
pm8xxx_mpp_update(pctrl, pin);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int pm8xxx_mpp_direction_output(struct gpio_chip *chip,
|
|
unsigned offset,
|
|
int value)
|
|
{
|
|
struct pm8xxx_mpp *pctrl = gpiochip_get_data(chip);
|
|
struct pm8xxx_pin_data *pin = pctrl->desc.pins[offset].drv_data;
|
|
|
|
switch (pin->mode) {
|
|
case PM8XXX_MPP_DIGITAL:
|
|
pin->output = true;
|
|
break;
|
|
case PM8XXX_MPP_ANALOG:
|
|
pin->input = false;
|
|
pin->output = true;
|
|
break;
|
|
case PM8XXX_MPP_SINK:
|
|
pin->input = false;
|
|
pin->output = true;
|
|
break;
|
|
}
|
|
|
|
pm8xxx_mpp_update(pctrl, pin);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int pm8xxx_mpp_get(struct gpio_chip *chip, unsigned offset)
|
|
{
|
|
struct pm8xxx_mpp *pctrl = gpiochip_get_data(chip);
|
|
struct pm8xxx_pin_data *pin = pctrl->desc.pins[offset].drv_data;
|
|
bool state;
|
|
int ret;
|
|
|
|
if (!pin->input)
|
|
return !!pin->output_value;
|
|
|
|
ret = irq_get_irqchip_state(pin->irq, IRQCHIP_STATE_LINE_LEVEL, &state);
|
|
if (!ret)
|
|
ret = !!state;
|
|
|
|
return ret;
|
|
}
|
|
|
|
static void pm8xxx_mpp_set(struct gpio_chip *chip, unsigned offset, int value)
|
|
{
|
|
struct pm8xxx_mpp *pctrl = gpiochip_get_data(chip);
|
|
struct pm8xxx_pin_data *pin = pctrl->desc.pins[offset].drv_data;
|
|
|
|
pin->output_value = !!value;
|
|
|
|
pm8xxx_mpp_update(pctrl, pin);
|
|
}
|
|
|
|
static int pm8xxx_mpp_of_xlate(struct gpio_chip *chip,
|
|
const struct of_phandle_args *gpio_desc,
|
|
u32 *flags)
|
|
{
|
|
if (chip->of_gpio_n_cells < 2)
|
|
return -EINVAL;
|
|
|
|
if (flags)
|
|
*flags = gpio_desc->args[1];
|
|
|
|
return gpio_desc->args[0] - 1;
|
|
}
|
|
|
|
|
|
static int pm8xxx_mpp_to_irq(struct gpio_chip *chip, unsigned offset)
|
|
{
|
|
struct pm8xxx_mpp *pctrl = gpiochip_get_data(chip);
|
|
struct pm8xxx_pin_data *pin = pctrl->desc.pins[offset].drv_data;
|
|
|
|
return pin->irq;
|
|
}
|
|
|
|
#ifdef CONFIG_DEBUG_FS
|
|
#include <linux/seq_file.h>
|
|
|
|
static void pm8xxx_mpp_dbg_show_one(struct seq_file *s,
|
|
struct pinctrl_dev *pctldev,
|
|
struct gpio_chip *chip,
|
|
unsigned offset,
|
|
unsigned gpio)
|
|
{
|
|
struct pm8xxx_mpp *pctrl = gpiochip_get_data(chip);
|
|
struct pm8xxx_pin_data *pin = pctrl->desc.pins[offset].drv_data;
|
|
|
|
static const char * const aout_lvls[] = {
|
|
"1v25", "1v25_2", "0v625", "0v3125", "mpp", "abus1", "abus2",
|
|
"abus3"
|
|
};
|
|
|
|
static const char * const amuxs[] = {
|
|
"amux5", "amux6", "amux7", "amux8", "amux9", "abus1", "abus2",
|
|
"abus3",
|
|
};
|
|
|
|
seq_printf(s, " mpp%-2d:", offset + 1);
|
|
|
|
switch (pin->mode) {
|
|
case PM8XXX_MPP_DIGITAL:
|
|
seq_puts(s, " digital ");
|
|
if (pin->dtest) {
|
|
seq_printf(s, "dtest%d\n", pin->dtest);
|
|
} else if (pin->input && pin->output) {
|
|
if (pin->high_z)
|
|
seq_puts(s, "bi-dir high-z");
|
|
else
|
|
seq_printf(s, "bi-dir %dOhm", pin->pullup);
|
|
} else if (pin->input) {
|
|
if (pin->dtest)
|
|
seq_printf(s, "in dtest%d", pin->dtest);
|
|
else
|
|
seq_puts(s, "in gpio");
|
|
} else if (pin->output) {
|
|
seq_puts(s, "out ");
|
|
|
|
if (!pin->paired) {
|
|
seq_puts(s, pin->output_value ?
|
|
"high" : "low");
|
|
} else {
|
|
seq_puts(s, pin->output_value ?
|
|
"inverted" : "follow");
|
|
}
|
|
}
|
|
break;
|
|
case PM8XXX_MPP_ANALOG:
|
|
seq_puts(s, " analog ");
|
|
if (pin->output) {
|
|
seq_printf(s, "out %s ", aout_lvls[pin->aout_level]);
|
|
if (!pin->paired) {
|
|
seq_puts(s, pin->output_value ?
|
|
"high" : "low");
|
|
} else {
|
|
seq_puts(s, pin->output_value ?
|
|
"inverted" : "follow");
|
|
}
|
|
} else {
|
|
seq_printf(s, "input mux %s", amuxs[pin->amux]);
|
|
}
|
|
break;
|
|
case PM8XXX_MPP_SINK:
|
|
seq_printf(s, " sink %dmA ", pin->drive_strength);
|
|
if (pin->dtest) {
|
|
seq_printf(s, "dtest%d", pin->dtest);
|
|
} else {
|
|
if (!pin->paired) {
|
|
seq_puts(s, pin->output_value ?
|
|
"high" : "low");
|
|
} else {
|
|
seq_puts(s, pin->output_value ?
|
|
"inverted" : "follow");
|
|
}
|
|
}
|
|
break;
|
|
}
|
|
|
|
}
|
|
|
|
static void pm8xxx_mpp_dbg_show(struct seq_file *s, struct gpio_chip *chip)
|
|
{
|
|
unsigned gpio = chip->base;
|
|
unsigned i;
|
|
|
|
for (i = 0; i < chip->ngpio; i++, gpio++) {
|
|
pm8xxx_mpp_dbg_show_one(s, NULL, chip, i, gpio);
|
|
seq_puts(s, "\n");
|
|
}
|
|
}
|
|
|
|
#else
|
|
#define pm8xxx_mpp_dbg_show NULL
|
|
#endif
|
|
|
|
static struct gpio_chip pm8xxx_mpp_template = {
|
|
.direction_input = pm8xxx_mpp_direction_input,
|
|
.direction_output = pm8xxx_mpp_direction_output,
|
|
.get = pm8xxx_mpp_get,
|
|
.set = pm8xxx_mpp_set,
|
|
.of_xlate = pm8xxx_mpp_of_xlate,
|
|
.to_irq = pm8xxx_mpp_to_irq,
|
|
.dbg_show = pm8xxx_mpp_dbg_show,
|
|
.owner = THIS_MODULE,
|
|
};
|
|
|
|
static int pm8xxx_pin_populate(struct pm8xxx_mpp *pctrl,
|
|
struct pm8xxx_pin_data *pin)
|
|
{
|
|
unsigned int val;
|
|
unsigned level;
|
|
unsigned ctrl;
|
|
unsigned type;
|
|
int ret;
|
|
|
|
ret = regmap_read(pctrl->regmap, pin->reg, &val);
|
|
if (ret) {
|
|
dev_err(pctrl->dev, "failed to read register\n");
|
|
return ret;
|
|
}
|
|
|
|
type = (val >> 5) & 7;
|
|
level = (val >> 2) & 7;
|
|
ctrl = (val) & 3;
|
|
|
|
switch (type) {
|
|
case PM8XXX_MPP_TYPE_D_INPUT:
|
|
pin->mode = PM8XXX_MPP_DIGITAL;
|
|
pin->input = true;
|
|
pin->power_source = level;
|
|
pin->dtest = ctrl;
|
|
break;
|
|
case PM8XXX_MPP_TYPE_D_OUTPUT:
|
|
pin->mode = PM8XXX_MPP_DIGITAL;
|
|
pin->output = true;
|
|
pin->power_source = level;
|
|
pin->output_value = !!(ctrl & BIT(0));
|
|
pin->paired = !!(ctrl & BIT(1));
|
|
break;
|
|
case PM8XXX_MPP_TYPE_D_BI_DIR:
|
|
pin->mode = PM8XXX_MPP_DIGITAL;
|
|
pin->input = true;
|
|
pin->output = true;
|
|
pin->power_source = level;
|
|
switch (ctrl) {
|
|
case PM8XXX_MPP_BI_PULLUP_1KOHM:
|
|
pin->pullup = 600;
|
|
break;
|
|
case PM8XXX_MPP_BI_PULLUP_OPEN:
|
|
pin->high_z = true;
|
|
break;
|
|
case PM8XXX_MPP_BI_PULLUP_10KOHM:
|
|
pin->pullup = 10000;
|
|
break;
|
|
case PM8XXX_MPP_BI_PULLUP_30KOHM:
|
|
pin->pullup = 30000;
|
|
break;
|
|
}
|
|
break;
|
|
case PM8XXX_MPP_TYPE_A_INPUT:
|
|
pin->mode = PM8XXX_MPP_ANALOG;
|
|
pin->input = true;
|
|
pin->amux = level;
|
|
break;
|
|
case PM8XXX_MPP_TYPE_A_OUTPUT:
|
|
pin->mode = PM8XXX_MPP_ANALOG;
|
|
pin->output = true;
|
|
pin->aout_level = level;
|
|
pin->output_value = !!(ctrl & BIT(0));
|
|
pin->paired = !!(ctrl & BIT(1));
|
|
break;
|
|
case PM8XXX_MPP_TYPE_SINK:
|
|
pin->mode = PM8XXX_MPP_SINK;
|
|
pin->drive_strength = 5 * (level + 1);
|
|
pin->output_value = !!(ctrl & BIT(0));
|
|
pin->paired = !!(ctrl & BIT(1));
|
|
break;
|
|
case PM8XXX_MPP_TYPE_DTEST_SINK:
|
|
pin->mode = PM8XXX_MPP_SINK;
|
|
pin->dtest = ctrl + 1;
|
|
pin->drive_strength = 5 * (level + 1);
|
|
break;
|
|
case PM8XXX_MPP_TYPE_DTEST_OUTPUT:
|
|
pin->mode = PM8XXX_MPP_DIGITAL;
|
|
pin->power_source = level;
|
|
if (ctrl >= 1)
|
|
pin->dtest = ctrl;
|
|
break;
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static const struct of_device_id pm8xxx_mpp_of_match[] = {
|
|
{ .compatible = "qcom,pm8018-mpp" },
|
|
{ .compatible = "qcom,pm8038-mpp" },
|
|
{ .compatible = "qcom,pm8917-mpp" },
|
|
{ .compatible = "qcom,pm8821-mpp" },
|
|
{ .compatible = "qcom,pm8921-mpp" },
|
|
{ .compatible = "qcom,ssbi-mpp" },
|
|
{ },
|
|
};
|
|
MODULE_DEVICE_TABLE(of, pm8xxx_mpp_of_match);
|
|
|
|
static int pm8xxx_mpp_probe(struct platform_device *pdev)
|
|
{
|
|
struct pm8xxx_pin_data *pin_data;
|
|
struct pinctrl_pin_desc *pins;
|
|
struct pm8xxx_mpp *pctrl;
|
|
int ret;
|
|
int i, npins;
|
|
|
|
pctrl = devm_kzalloc(&pdev->dev, sizeof(*pctrl), GFP_KERNEL);
|
|
if (!pctrl)
|
|
return -ENOMEM;
|
|
|
|
pctrl->dev = &pdev->dev;
|
|
npins = platform_irq_count(pdev);
|
|
if (!npins)
|
|
return -EINVAL;
|
|
if (npins < 0)
|
|
return npins;
|
|
pctrl->npins = npins;
|
|
|
|
pctrl->regmap = dev_get_regmap(pdev->dev.parent, NULL);
|
|
if (!pctrl->regmap) {
|
|
dev_err(&pdev->dev, "parent regmap unavailable\n");
|
|
return -ENXIO;
|
|
}
|
|
|
|
pctrl->desc = pm8xxx_pinctrl_desc;
|
|
pctrl->desc.npins = pctrl->npins;
|
|
|
|
pins = devm_kcalloc(&pdev->dev,
|
|
pctrl->desc.npins,
|
|
sizeof(struct pinctrl_pin_desc),
|
|
GFP_KERNEL);
|
|
if (!pins)
|
|
return -ENOMEM;
|
|
|
|
pin_data = devm_kcalloc(&pdev->dev,
|
|
pctrl->desc.npins,
|
|
sizeof(struct pm8xxx_pin_data),
|
|
GFP_KERNEL);
|
|
if (!pin_data)
|
|
return -ENOMEM;
|
|
|
|
for (i = 0; i < pctrl->desc.npins; i++) {
|
|
pin_data[i].reg = SSBI_REG_ADDR_MPP(i);
|
|
pin_data[i].irq = platform_get_irq(pdev, i);
|
|
if (pin_data[i].irq < 0) {
|
|
dev_err(&pdev->dev,
|
|
"missing interrupts for pin %d\n", i);
|
|
return pin_data[i].irq;
|
|
}
|
|
|
|
ret = pm8xxx_pin_populate(pctrl, &pin_data[i]);
|
|
if (ret)
|
|
return ret;
|
|
|
|
pins[i].number = i;
|
|
pins[i].name = pm8xxx_groups[i];
|
|
pins[i].drv_data = &pin_data[i];
|
|
}
|
|
pctrl->desc.pins = pins;
|
|
|
|
pctrl->desc.num_custom_params = ARRAY_SIZE(pm8xxx_mpp_bindings);
|
|
pctrl->desc.custom_params = pm8xxx_mpp_bindings;
|
|
#ifdef CONFIG_DEBUG_FS
|
|
pctrl->desc.custom_conf_items = pm8xxx_conf_items;
|
|
#endif
|
|
|
|
pctrl->pctrl = pinctrl_register(&pctrl->desc, &pdev->dev, pctrl);
|
|
if (IS_ERR(pctrl->pctrl)) {
|
|
dev_err(&pdev->dev, "couldn't register pm8xxx mpp driver\n");
|
|
return PTR_ERR(pctrl->pctrl);
|
|
}
|
|
|
|
pctrl->chip = pm8xxx_mpp_template;
|
|
pctrl->chip.base = -1;
|
|
pctrl->chip.parent = &pdev->dev;
|
|
pctrl->chip.of_node = pdev->dev.of_node;
|
|
pctrl->chip.of_gpio_n_cells = 2;
|
|
pctrl->chip.label = dev_name(pctrl->dev);
|
|
pctrl->chip.ngpio = pctrl->npins;
|
|
ret = gpiochip_add_data(&pctrl->chip, pctrl);
|
|
if (ret) {
|
|
dev_err(&pdev->dev, "failed register gpiochip\n");
|
|
goto unregister_pinctrl;
|
|
}
|
|
|
|
ret = gpiochip_add_pin_range(&pctrl->chip,
|
|
dev_name(pctrl->dev),
|
|
0, 0, pctrl->chip.ngpio);
|
|
if (ret) {
|
|
dev_err(pctrl->dev, "failed to add pin range\n");
|
|
goto unregister_gpiochip;
|
|
}
|
|
|
|
platform_set_drvdata(pdev, pctrl);
|
|
|
|
dev_dbg(&pdev->dev, "Qualcomm pm8xxx mpp driver probed\n");
|
|
|
|
return 0;
|
|
|
|
unregister_gpiochip:
|
|
gpiochip_remove(&pctrl->chip);
|
|
|
|
unregister_pinctrl:
|
|
pinctrl_unregister(pctrl->pctrl);
|
|
|
|
return ret;
|
|
}
|
|
|
|
static int pm8xxx_mpp_remove(struct platform_device *pdev)
|
|
{
|
|
struct pm8xxx_mpp *pctrl = platform_get_drvdata(pdev);
|
|
|
|
gpiochip_remove(&pctrl->chip);
|
|
|
|
pinctrl_unregister(pctrl->pctrl);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static struct platform_driver pm8xxx_mpp_driver = {
|
|
.driver = {
|
|
.name = "qcom-ssbi-mpp",
|
|
.of_match_table = pm8xxx_mpp_of_match,
|
|
},
|
|
.probe = pm8xxx_mpp_probe,
|
|
.remove = pm8xxx_mpp_remove,
|
|
};
|
|
|
|
module_platform_driver(pm8xxx_mpp_driver);
|
|
|
|
MODULE_AUTHOR("Bjorn Andersson <bjorn.andersson@sonymobile.com>");
|
|
MODULE_DESCRIPTION("Qualcomm PM8xxx MPP driver");
|
|
MODULE_LICENSE("GPL v2");
|