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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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58ea1d53ba
The r8a7791 has three VSP1 instances, one of them being named VSPS (which stands for "VSP Standard"). The clock section in the SoC datasheet misunderstood the abbreviation as meaning VSP System, and named the corresponding clock VSP1(SY). This mistake has been carried over to the kernel code. Fix this by renaming the VSP1_SY clock to VSP1_S. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Acked-by: Magnus Damm <damm@opensource.se> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
112 lines
2.8 KiB
C
112 lines
2.8 KiB
C
/*
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* Copyright 2013 Ideas On Board SPRL
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*/
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#ifndef __DT_BINDINGS_CLOCK_R8A7791_H__
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#define __DT_BINDINGS_CLOCK_R8A7791_H__
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/* CPG */
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#define R8A7791_CLK_MAIN 0
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#define R8A7791_CLK_PLL0 1
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#define R8A7791_CLK_PLL1 2
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#define R8A7791_CLK_PLL3 3
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#define R8A7791_CLK_LB 4
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#define R8A7791_CLK_QSPI 5
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#define R8A7791_CLK_SDH 6
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#define R8A7791_CLK_SD0 7
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#define R8A7791_CLK_Z 8
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/* MSTP0 */
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#define R8A7791_CLK_MSIOF0 0
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/* MSTP1 */
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#define R8A7791_CLK_TMU1 11
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#define R8A7791_CLK_TMU3 21
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#define R8A7791_CLK_TMU2 22
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#define R8A7791_CLK_CMT0 24
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#define R8A7791_CLK_TMU0 25
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#define R8A7791_CLK_VSP1_DU1 27
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#define R8A7791_CLK_VSP1_DU0 28
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#define R8A7791_CLK_VSP1_S 31
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/* MSTP2 */
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#define R8A7791_CLK_SCIFA2 2
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#define R8A7791_CLK_SCIFA1 3
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#define R8A7791_CLK_SCIFA0 4
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#define R8A7791_CLK_MSIOF2 5
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#define R8A7791_CLK_SCIFB0 6
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#define R8A7791_CLK_SCIFB1 7
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#define R8A7791_CLK_MSIOF1 8
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#define R8A7791_CLK_SCIFB2 16
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#define R8A7791_CLK_DMAC 18
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/* MSTP3 */
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#define R8A7791_CLK_TPU0 4
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#define R8A7791_CLK_SDHI2 11
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#define R8A7791_CLK_SDHI1 12
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#define R8A7791_CLK_SDHI0 14
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#define R8A7791_CLK_MMCIF0 15
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#define R8A7791_CLK_SSUSB 28
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#define R8A7791_CLK_CMT1 29
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#define R8A7791_CLK_USBDMAC0 30
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#define R8A7791_CLK_USBDMAC1 31
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/* MSTP5 */
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#define R8A7791_CLK_THERMAL 22
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#define R8A7791_CLK_PWM 23
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/* MSTP7 */
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#define R8A7791_CLK_HSUSB 4
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#define R8A7791_CLK_HSCIF2 13
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#define R8A7791_CLK_SCIF5 14
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#define R8A7791_CLK_SCIF4 15
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#define R8A7791_CLK_HSCIF1 16
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#define R8A7791_CLK_HSCIF0 17
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#define R8A7791_CLK_SCIF3 18
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#define R8A7791_CLK_SCIF2 19
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#define R8A7791_CLK_SCIF1 20
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#define R8A7791_CLK_SCIF0 21
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#define R8A7791_CLK_DU1 23
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#define R8A7791_CLK_DU0 24
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#define R8A7791_CLK_LVDS0 26
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/* MSTP8 */
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#define R8A7791_CLK_VIN2 9
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#define R8A7791_CLK_VIN1 10
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#define R8A7791_CLK_VIN0 11
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#define R8A7791_CLK_ETHER 13
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#define R8A7791_CLK_SATA1 14
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#define R8A7791_CLK_SATA0 15
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/* MSTP9 */
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#define R8A7791_CLK_GPIO7 4
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#define R8A7791_CLK_GPIO6 5
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#define R8A7791_CLK_GPIO5 7
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#define R8A7791_CLK_GPIO4 8
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#define R8A7791_CLK_GPIO3 9
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#define R8A7791_CLK_GPIO2 10
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#define R8A7791_CLK_GPIO1 11
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#define R8A7791_CLK_GPIO0 12
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#define R8A7791_CLK_RCAN1 15
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#define R8A7791_CLK_RCAN0 16
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#define R8A7791_CLK_QSPI_MOD 17
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#define R8A7791_CLK_I2C5 25
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#define R8A7791_CLK_IICDVFS 26
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#define R8A7791_CLK_I2C4 27
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#define R8A7791_CLK_I2C3 28
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#define R8A7791_CLK_I2C2 29
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#define R8A7791_CLK_I2C1 30
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#define R8A7791_CLK_I2C0 31
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/* MSTP11 */
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#define R8A7791_CLK_SCIFA3 6
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#define R8A7791_CLK_SCIFA4 7
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#define R8A7791_CLK_SCIFA5 8
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#endif /* __DT_BINDINGS_CLOCK_R8A7791_H__ */
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