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f6a9ff0783
For OTG and Embedded hosts, they may need TPL (Targeted Peripheral List) for usb certification and other vender specific requirements, the platform can tell chipidea core driver if it supports tpl through DT or platform data. Signed-off-by: Peter Chen <peter.chen@freescale.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
48 lines
1.3 KiB
C
48 lines
1.3 KiB
C
/*
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* Platform data for the chipidea USB dual role controller
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*/
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#ifndef __LINUX_USB_CHIPIDEA_H
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#define __LINUX_USB_CHIPIDEA_H
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#include <linux/usb/otg.h>
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struct ci_hdrc;
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struct ci_hdrc_platform_data {
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const char *name;
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/* offset of the capability registers */
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uintptr_t capoffset;
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unsigned power_budget;
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struct usb_phy *phy;
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enum usb_phy_interface phy_mode;
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unsigned long flags;
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#define CI_HDRC_REGS_SHARED BIT(0)
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#define CI_HDRC_REQUIRE_TRANSCEIVER BIT(1)
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#define CI_HDRC_DISABLE_STREAMING BIT(3)
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/*
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* Only set it when DCCPARAMS.DC==1 and DCCPARAMS.HC==1,
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* but otg is not supported (no register otgsc).
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*/
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#define CI_HDRC_DUAL_ROLE_NOT_OTG BIT(4)
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#define CI_HDRC_IMX28_WRITE_FIX BIT(5)
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#define CI_HDRC_FORCE_FULLSPEED BIT(6)
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enum usb_dr_mode dr_mode;
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#define CI_HDRC_CONTROLLER_RESET_EVENT 0
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#define CI_HDRC_CONTROLLER_STOPPED_EVENT 1
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void (*notify_event) (struct ci_hdrc *ci, unsigned event);
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struct regulator *reg_vbus;
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bool tpl_support;
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};
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/* Default offset of capability registers */
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#define DEF_CAPOFFSET 0x100
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/* Add ci hdrc device */
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struct platform_device *ci_hdrc_add_device(struct device *dev,
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struct resource *res, int nres,
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struct ci_hdrc_platform_data *platdata);
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/* Remove ci hdrc device */
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void ci_hdrc_remove_device(struct platform_device *pdev);
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#endif
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