mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-28 11:18:45 +07:00
9fb1f39eb2
This switches the two members of struct gpio_chip that were defined as unsigned foo:1 to bool, because that is indeed what they are. Switch all users in the gpio and pinctrl subsystems to assign these values with true/false instead of 0/1. The users outside these subsystems will survive since true/false is 1/0, atleast we set some kind of more strict typing example. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
320 lines
7.4 KiB
C
320 lines
7.4 KiB
C
/*
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* arch/arm/mach-ks8695/gpio.c
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*
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* Copyright (C) 2006 Andrew Victor
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* Updated to GPIOLIB, Copyright 2008 Simtec Electronics
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* Daniel Silverstone <dsilvers@simtec.co.uk>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#include <linux/gpio.h>
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#include <linux/kernel.h>
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#include <linux/mm.h>
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#include <linux/init.h>
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#include <linux/debugfs.h>
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#include <linux/seq_file.h>
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#include <linux/module.h>
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#include <linux/io.h>
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#include <mach/hardware.h>
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#include <asm/mach/irq.h>
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#include <mach/regs-gpio.h>
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#include <mach/gpio-ks8695.h>
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/*
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* Configure a GPIO line for either GPIO function, or its internal
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* function (Interrupt, Timer, etc).
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*/
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static void ks8695_gpio_mode(unsigned int pin, short gpio)
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{
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unsigned int enable[] = { IOPC_IOEINT0EN, IOPC_IOEINT1EN, IOPC_IOEINT2EN, IOPC_IOEINT3EN, IOPC_IOTIM0EN, IOPC_IOTIM1EN };
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unsigned long x, flags;
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if (pin > KS8695_GPIO_5) /* only GPIO 0..5 have internal functions */
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return;
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local_irq_save(flags);
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x = __raw_readl(KS8695_GPIO_VA + KS8695_IOPC);
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if (gpio) /* GPIO: set bit to 0 */
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x &= ~enable[pin];
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else /* Internal function: set bit to 1 */
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x |= enable[pin];
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__raw_writel(x, KS8695_GPIO_VA + KS8695_IOPC);
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local_irq_restore(flags);
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}
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static unsigned short gpio_irq[] = { KS8695_IRQ_EXTERN0, KS8695_IRQ_EXTERN1, KS8695_IRQ_EXTERN2, KS8695_IRQ_EXTERN3 };
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/*
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* Configure GPIO pin as external interrupt source.
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*/
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int ks8695_gpio_interrupt(unsigned int pin, unsigned int type)
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{
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unsigned long x, flags;
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if (pin > KS8695_GPIO_3) /* only GPIO 0..3 can generate IRQ */
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return -EINVAL;
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local_irq_save(flags);
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/* set pin as input */
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x = __raw_readl(KS8695_GPIO_VA + KS8695_IOPM);
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x &= ~IOPM(pin);
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__raw_writel(x, KS8695_GPIO_VA + KS8695_IOPM);
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local_irq_restore(flags);
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/* Set IRQ triggering type */
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irq_set_irq_type(gpio_irq[pin], type);
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/* enable interrupt mode */
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ks8695_gpio_mode(pin, 0);
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return 0;
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}
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EXPORT_SYMBOL(ks8695_gpio_interrupt);
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/* .... Generic GPIO interface .............................................. */
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/*
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* Configure the GPIO line as an input.
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*/
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static int ks8695_gpio_direction_input(struct gpio_chip *gc, unsigned int pin)
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{
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unsigned long x, flags;
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if (pin > KS8695_GPIO_15)
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return -EINVAL;
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/* set pin to GPIO mode */
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ks8695_gpio_mode(pin, 1);
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local_irq_save(flags);
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/* set pin as input */
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x = __raw_readl(KS8695_GPIO_VA + KS8695_IOPM);
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x &= ~IOPM(pin);
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__raw_writel(x, KS8695_GPIO_VA + KS8695_IOPM);
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local_irq_restore(flags);
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return 0;
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}
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/*
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* Configure the GPIO line as an output, with default state.
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*/
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static int ks8695_gpio_direction_output(struct gpio_chip *gc,
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unsigned int pin, int state)
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{
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unsigned long x, flags;
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if (pin > KS8695_GPIO_15)
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return -EINVAL;
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/* set pin to GPIO mode */
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ks8695_gpio_mode(pin, 1);
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local_irq_save(flags);
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/* set line state */
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x = __raw_readl(KS8695_GPIO_VA + KS8695_IOPD);
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if (state)
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x |= IOPD(pin);
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else
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x &= ~IOPD(pin);
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__raw_writel(x, KS8695_GPIO_VA + KS8695_IOPD);
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/* set pin as output */
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x = __raw_readl(KS8695_GPIO_VA + KS8695_IOPM);
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x |= IOPM(pin);
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__raw_writel(x, KS8695_GPIO_VA + KS8695_IOPM);
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local_irq_restore(flags);
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return 0;
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}
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/*
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* Set the state of an output GPIO line.
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*/
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static void ks8695_gpio_set_value(struct gpio_chip *gc,
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unsigned int pin, int state)
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{
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unsigned long x, flags;
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if (pin > KS8695_GPIO_15)
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return;
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local_irq_save(flags);
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/* set output line state */
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x = __raw_readl(KS8695_GPIO_VA + KS8695_IOPD);
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if (state)
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x |= IOPD(pin);
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else
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x &= ~IOPD(pin);
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__raw_writel(x, KS8695_GPIO_VA + KS8695_IOPD);
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local_irq_restore(flags);
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}
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/*
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* Read the state of a GPIO line.
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*/
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static int ks8695_gpio_get_value(struct gpio_chip *gc, unsigned int pin)
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{
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unsigned long x;
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if (pin > KS8695_GPIO_15)
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return -EINVAL;
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x = __raw_readl(KS8695_GPIO_VA + KS8695_IOPD);
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return (x & IOPD(pin)) != 0;
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}
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/*
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* Map GPIO line to IRQ number.
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*/
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static int ks8695_gpio_to_irq(struct gpio_chip *gc, unsigned int pin)
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{
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if (pin > KS8695_GPIO_3) /* only GPIO 0..3 can generate IRQ */
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return -EINVAL;
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return gpio_irq[pin];
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}
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/*
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* Map IRQ number to GPIO line.
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*/
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int irq_to_gpio(unsigned int irq)
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{
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if ((irq < KS8695_IRQ_EXTERN0) || (irq > KS8695_IRQ_EXTERN3))
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return -EINVAL;
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return (irq - KS8695_IRQ_EXTERN0);
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}
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EXPORT_SYMBOL(irq_to_gpio);
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/* GPIOLIB interface */
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static struct gpio_chip ks8695_gpio_chip = {
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.label = "KS8695",
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.direction_input = ks8695_gpio_direction_input,
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.direction_output = ks8695_gpio_direction_output,
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.get = ks8695_gpio_get_value,
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.set = ks8695_gpio_set_value,
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.to_irq = ks8695_gpio_to_irq,
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.base = 0,
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.ngpio = 16,
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.can_sleep = false,
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};
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/* Register the GPIOs */
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void ks8695_register_gpios(void)
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{
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if (gpiochip_add(&ks8695_gpio_chip))
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printk(KERN_ERR "Unable to register core GPIOs\n");
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}
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/* .... Debug interface ..................................................... */
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#ifdef CONFIG_DEBUG_FS
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static int ks8695_gpio_show(struct seq_file *s, void *unused)
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{
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unsigned int enable[] = { IOPC_IOEINT0EN, IOPC_IOEINT1EN, IOPC_IOEINT2EN, IOPC_IOEINT3EN, IOPC_IOTIM0EN, IOPC_IOTIM1EN };
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unsigned int intmask[] = { IOPC_IOEINT0TM, IOPC_IOEINT1TM, IOPC_IOEINT2TM, IOPC_IOEINT3TM };
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unsigned long mode, ctrl, data;
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int i;
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mode = __raw_readl(KS8695_GPIO_VA + KS8695_IOPM);
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ctrl = __raw_readl(KS8695_GPIO_VA + KS8695_IOPC);
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data = __raw_readl(KS8695_GPIO_VA + KS8695_IOPD);
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seq_printf(s, "Pin\tI/O\tFunction\tState\n\n");
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for (i = KS8695_GPIO_0; i <= KS8695_GPIO_15 ; i++) {
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seq_printf(s, "%i:\t", i);
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seq_printf(s, "%s\t", (mode & IOPM(i)) ? "Output" : "Input");
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if (i <= KS8695_GPIO_3) {
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if (ctrl & enable[i]) {
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seq_printf(s, "EXT%i ", i);
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switch ((ctrl & intmask[i]) >> (4 * i)) {
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case IOPC_TM_LOW:
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seq_printf(s, "(Low)"); break;
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case IOPC_TM_HIGH:
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seq_printf(s, "(High)"); break;
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case IOPC_TM_RISING:
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seq_printf(s, "(Rising)"); break;
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case IOPC_TM_FALLING:
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seq_printf(s, "(Falling)"); break;
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case IOPC_TM_EDGE:
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seq_printf(s, "(Edges)"); break;
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}
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}
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else
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seq_printf(s, "GPIO\t");
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}
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else if (i <= KS8695_GPIO_5) {
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if (ctrl & enable[i])
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seq_printf(s, "TOUT%i\t", i - KS8695_GPIO_4);
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else
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seq_printf(s, "GPIO\t");
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}
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else
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seq_printf(s, "GPIO\t");
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seq_printf(s, "\t");
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seq_printf(s, "%i\n", (data & IOPD(i)) ? 1 : 0);
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}
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return 0;
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}
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static int ks8695_gpio_open(struct inode *inode, struct file *file)
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{
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return single_open(file, ks8695_gpio_show, NULL);
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}
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static const struct file_operations ks8695_gpio_operations = {
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.open = ks8695_gpio_open,
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.read = seq_read,
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.llseek = seq_lseek,
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.release = single_release,
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};
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static int __init ks8695_gpio_debugfs_init(void)
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{
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/* /sys/kernel/debug/ks8695_gpio */
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(void) debugfs_create_file("ks8695_gpio", S_IFREG | S_IRUGO, NULL, NULL, &ks8695_gpio_operations);
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return 0;
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}
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postcore_initcall(ks8695_gpio_debugfs_init);
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#endif
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