mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-15 11:56:45 +07:00
a206767629
Current keystone.dtsi includes SoC specific definitions for K2HK SoCs. In order to support two addition keystone devices, k2 Edison and K2 Lamarr and corresponding EVMs, This patch restructure the dts files for the following:- - All clock nodes that are only available in k2hk SoC are moved from keystone-clocks.dtsi to a new k2hk-clocks.dtsi include file - The CPU nodes are now part of the soc specific k2hk.dtsi. - Change the compatibility string to ti,k2hk-evm and change the model name accordingly - Finally include k2hk-clocks.dtsi in k2hk.dtsi and that in k2hk-evm.dts Cc: Olof Johansson <olof@lixom.net> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Rob Herring <robh+dt@kernel.org> Cc: Kumar Gala <galak@codeaurora.org> Cc: Mark Rutland <mark.rutland@arm.com> Signed-off-by: Murali Karicheri <m-karicheri2@ti.com> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
415 lines
9.6 KiB
Plaintext
415 lines
9.6 KiB
Plaintext
/*
|
|
* Device Tree Source for Keystone 2 clock tree
|
|
*
|
|
* Copyright (C) 2013 Texas Instruments, Inc.
|
|
*
|
|
* This program is free software; you can redistribute it and/or modify
|
|
* it under the terms of the GNU General Public License version 2 as
|
|
* published by the Free Software Foundation.
|
|
*/
|
|
|
|
clocks {
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
ranges;
|
|
|
|
mainmuxclk: mainmuxclk@2310108 {
|
|
#clock-cells = <0>;
|
|
compatible = "ti,keystone,pll-mux-clock";
|
|
clocks = <&mainpllclk>, <&refclksys>;
|
|
reg = <0x02310108 4>;
|
|
bit-shift = <23>;
|
|
bit-mask = <1>;
|
|
clock-output-names = "mainmuxclk";
|
|
};
|
|
|
|
chipclk1: chipclk1 {
|
|
#clock-cells = <0>;
|
|
compatible = "fixed-factor-clock";
|
|
clocks = <&mainmuxclk>;
|
|
clock-div = <1>;
|
|
clock-mult = <1>;
|
|
clock-output-names = "chipclk1";
|
|
};
|
|
|
|
chipclk1rstiso: chipclk1rstiso {
|
|
#clock-cells = <0>;
|
|
compatible = "fixed-factor-clock";
|
|
clocks = <&mainmuxclk>;
|
|
clock-div = <1>;
|
|
clock-mult = <1>;
|
|
clock-output-names = "chipclk1rstiso";
|
|
};
|
|
|
|
gemtraceclk: gemtraceclk@2310120 {
|
|
#clock-cells = <0>;
|
|
compatible = "ti,keystone,pll-divider-clock";
|
|
clocks = <&mainmuxclk>;
|
|
reg = <0x02310120 4>;
|
|
bit-shift = <0>;
|
|
bit-mask = <8>;
|
|
clock-output-names = "gemtraceclk";
|
|
};
|
|
|
|
chipstmxptclk: chipstmxptclk {
|
|
#clock-cells = <0>;
|
|
compatible = "ti,keystone,pll-divider-clock";
|
|
clocks = <&mainmuxclk>;
|
|
reg = <0x02310164 4>;
|
|
bit-shift = <0>;
|
|
bit-mask = <8>;
|
|
clock-output-names = "chipstmxptclk";
|
|
};
|
|
|
|
chipclk12: chipclk12 {
|
|
#clock-cells = <0>;
|
|
compatible = "fixed-factor-clock";
|
|
clocks = <&chipclk1>;
|
|
clock-div = <2>;
|
|
clock-mult = <1>;
|
|
clock-output-names = "chipclk12";
|
|
};
|
|
|
|
chipclk13: chipclk13 {
|
|
#clock-cells = <0>;
|
|
compatible = "fixed-factor-clock";
|
|
clocks = <&chipclk1>;
|
|
clock-div = <3>;
|
|
clock-mult = <1>;
|
|
clock-output-names = "chipclk13";
|
|
};
|
|
|
|
paclk13: paclk13 {
|
|
#clock-cells = <0>;
|
|
compatible = "fixed-factor-clock";
|
|
clocks = <&papllclk>;
|
|
clock-div = <3>;
|
|
clock-mult = <1>;
|
|
clock-output-names = "paclk13";
|
|
};
|
|
|
|
chipclk14: chipclk14 {
|
|
#clock-cells = <0>;
|
|
compatible = "fixed-factor-clock";
|
|
clocks = <&chipclk1>;
|
|
clock-div = <4>;
|
|
clock-mult = <1>;
|
|
clock-output-names = "chipclk14";
|
|
};
|
|
|
|
chipclk16: chipclk16 {
|
|
#clock-cells = <0>;
|
|
compatible = "fixed-factor-clock";
|
|
clocks = <&chipclk1>;
|
|
clock-div = <6>;
|
|
clock-mult = <1>;
|
|
clock-output-names = "chipclk16";
|
|
};
|
|
|
|
chipclk112: chipclk112 {
|
|
#clock-cells = <0>;
|
|
compatible = "fixed-factor-clock";
|
|
clocks = <&chipclk1>;
|
|
clock-div = <12>;
|
|
clock-mult = <1>;
|
|
clock-output-names = "chipclk112";
|
|
};
|
|
|
|
chipclk124: chipclk124 {
|
|
#clock-cells = <0>;
|
|
compatible = "fixed-factor-clock";
|
|
clocks = <&chipclk1>;
|
|
clock-div = <24>;
|
|
clock-mult = <1>;
|
|
clock-output-names = "chipclk114";
|
|
};
|
|
|
|
chipclk1rstiso13: chipclk1rstiso13 {
|
|
#clock-cells = <0>;
|
|
compatible = "fixed-factor-clock";
|
|
clocks = <&chipclk1rstiso>;
|
|
clock-div = <3>;
|
|
clock-mult = <1>;
|
|
clock-output-names = "chipclk1rstiso13";
|
|
};
|
|
|
|
chipclk1rstiso14: chipclk1rstiso14 {
|
|
#clock-cells = <0>;
|
|
compatible = "fixed-factor-clock";
|
|
clocks = <&chipclk1rstiso>;
|
|
clock-div = <4>;
|
|
clock-mult = <1>;
|
|
clock-output-names = "chipclk1rstiso14";
|
|
};
|
|
|
|
chipclk1rstiso16: chipclk1rstiso16 {
|
|
#clock-cells = <0>;
|
|
compatible = "fixed-factor-clock";
|
|
clocks = <&chipclk1rstiso>;
|
|
clock-div = <6>;
|
|
clock-mult = <1>;
|
|
clock-output-names = "chipclk1rstiso16";
|
|
};
|
|
|
|
chipclk1rstiso112: chipclk1rstiso112 {
|
|
#clock-cells = <0>;
|
|
compatible = "fixed-factor-clock";
|
|
clocks = <&chipclk1rstiso>;
|
|
clock-div = <12>;
|
|
clock-mult = <1>;
|
|
clock-output-names = "chipclk1rstiso112";
|
|
};
|
|
|
|
clkmodrst0: clkmodrst0 {
|
|
#clock-cells = <0>;
|
|
compatible = "ti,keystone,psc-clock";
|
|
clocks = <&chipclk16>;
|
|
clock-output-names = "modrst0";
|
|
reg = <0x02350000 0xb00>, <0x02350000 0x400>;
|
|
reg-names = "control", "domain";
|
|
domain-id = <0>;
|
|
};
|
|
|
|
|
|
clkusb: clkusb {
|
|
#clock-cells = <0>;
|
|
compatible = "ti,keystone,psc-clock";
|
|
clocks = <&chipclk16>;
|
|
clock-output-names = "usb";
|
|
reg = <0x02350008 0xb00>, <0x02350000 0x400>;
|
|
reg-names = "control", "domain";
|
|
domain-id = <0>;
|
|
};
|
|
|
|
clkaemifspi: clkaemifspi {
|
|
#clock-cells = <0>;
|
|
compatible = "ti,keystone,psc-clock";
|
|
clocks = <&chipclk16>;
|
|
clock-output-names = "aemif-spi";
|
|
reg = <0x0235000c 0xb00>, <0x02350000 0x400>;
|
|
reg-names = "control", "domain";
|
|
domain-id = <0>;
|
|
};
|
|
|
|
|
|
clkdebugsstrc: clkdebugsstrc {
|
|
#clock-cells = <0>;
|
|
compatible = "ti,keystone,psc-clock";
|
|
clocks = <&chipclk13>;
|
|
clock-output-names = "debugss-trc";
|
|
reg = <0x02350014 0xb00>, <0x02350000 0x400>;
|
|
reg-names = "control", "domain";
|
|
domain-id = <1>;
|
|
};
|
|
|
|
clktetbtrc: clktetbtrc {
|
|
#clock-cells = <0>;
|
|
compatible = "ti,keystone,psc-clock";
|
|
clocks = <&chipclk13>;
|
|
clock-output-names = "tetb-trc";
|
|
reg = <0x02350018 0xb00>, <0x02350004 0x400>;
|
|
reg-names = "control", "domain";
|
|
domain-id = <1>;
|
|
};
|
|
|
|
clkpa: clkpa {
|
|
#clock-cells = <0>;
|
|
compatible = "ti,keystone,psc-clock";
|
|
clocks = <&chipclk16>;
|
|
clock-output-names = "pa";
|
|
reg = <0x0235001c 0xb00>, <0x02350008 0x400>;
|
|
reg-names = "control", "domain";
|
|
domain-id = <2>;
|
|
};
|
|
|
|
clkcpgmac: clkcpgmac {
|
|
#clock-cells = <0>;
|
|
compatible = "ti,keystone,psc-clock";
|
|
clocks = <&clkpa>;
|
|
clock-output-names = "cpgmac";
|
|
reg = <0x02350020 0xb00>, <0x02350008 0x400>;
|
|
reg-names = "control", "domain";
|
|
domain-id = <2>;
|
|
};
|
|
|
|
clksa: clksa {
|
|
#clock-cells = <0>;
|
|
compatible = "ti,keystone,psc-clock";
|
|
clocks = <&clkpa>;
|
|
clock-output-names = "sa";
|
|
reg = <0x02350024 0xb00>, <0x02350008 0x400>;
|
|
reg-names = "control", "domain";
|
|
domain-id = <2>;
|
|
};
|
|
|
|
clkpcie: clkpcie {
|
|
#clock-cells = <0>;
|
|
compatible = "ti,keystone,psc-clock";
|
|
clocks = <&chipclk12>;
|
|
clock-output-names = "pcie";
|
|
reg = <0x02350028 0xb00>, <0x0235000c 0x400>;
|
|
reg-names = "control", "domain";
|
|
domain-id = <3>;
|
|
};
|
|
|
|
clksr: clksr {
|
|
#clock-cells = <0>;
|
|
compatible = "ti,keystone,psc-clock";
|
|
clocks = <&chipclk1rstiso112>;
|
|
clock-output-names = "sr";
|
|
reg = <0x02350034 0xb00>, <0x02350018 0x400>;
|
|
reg-names = "control", "domain";
|
|
domain-id = <6>;
|
|
};
|
|
|
|
clkgem0: clkgem0 {
|
|
#clock-cells = <0>;
|
|
compatible = "ti,keystone,psc-clock";
|
|
clocks = <&chipclk1>;
|
|
clock-output-names = "gem0";
|
|
reg = <0x0235003c 0xb00>, <0x02350020 0x400>;
|
|
reg-names = "control", "domain";
|
|
domain-id = <8>;
|
|
};
|
|
|
|
clkddr30: clkddr30 {
|
|
#clock-cells = <0>;
|
|
compatible = "ti,keystone,psc-clock";
|
|
clocks = <&chipclk12>;
|
|
clock-output-names = "ddr3-0";
|
|
reg = <0x0235005c 0xb00>, <0x02350040 0x400>;
|
|
reg-names = "control", "domain";
|
|
domain-id = <16>;
|
|
};
|
|
|
|
clkwdtimer0: clkwdtimer0 {
|
|
#clock-cells = <0>;
|
|
compatible = "ti,keystone,psc-clock";
|
|
clocks = <&clkmodrst0>;
|
|
clock-output-names = "timer0";
|
|
reg = <0x02350000 0xb00>, <0x02350000 0x400>;
|
|
reg-names = "control", "domain";
|
|
domain-id = <0>;
|
|
};
|
|
|
|
clkwdtimer1: clkwdtimer1 {
|
|
#clock-cells = <0>;
|
|
compatible = "ti,keystone,psc-clock";
|
|
clocks = <&clkmodrst0>;
|
|
clock-output-names = "timer1";
|
|
reg = <0x02350000 0xb00>, <0x02350000 0x400>;
|
|
reg-names = "control", "domain";
|
|
domain-id = <0>;
|
|
};
|
|
|
|
clkwdtimer2: clkwdtimer2 {
|
|
#clock-cells = <0>;
|
|
compatible = "ti,keystone,psc-clock";
|
|
clocks = <&clkmodrst0>;
|
|
clock-output-names = "timer2";
|
|
reg = <0x02350000 0xb00>, <0x02350000 0x400>;
|
|
reg-names = "control", "domain";
|
|
domain-id = <0>;
|
|
};
|
|
|
|
clkwdtimer3: clkwdtimer3 {
|
|
#clock-cells = <0>;
|
|
compatible = "ti,keystone,psc-clock";
|
|
clocks = <&clkmodrst0>;
|
|
clock-output-names = "timer3";
|
|
reg = <0x02350000 0xb00>, <0x02350000 0x400>;
|
|
reg-names = "control", "domain";
|
|
domain-id = <0>;
|
|
};
|
|
|
|
clktimer15: clktimer15 {
|
|
#clock-cells = <0>;
|
|
compatible = "ti,keystone,psc-clock";
|
|
clocks = <&clkmodrst0>;
|
|
clock-output-names = "timer15";
|
|
reg = <0x02350000 0xb00>, <0x02350000 0x400>;
|
|
reg-names = "control", "domain";
|
|
domain-id = <0>;
|
|
};
|
|
|
|
clkuart0: clkuart0 {
|
|
#clock-cells = <0>;
|
|
compatible = "ti,keystone,psc-clock";
|
|
clocks = <&clkmodrst0>;
|
|
clock-output-names = "uart0";
|
|
reg = <0x02350000 0xb00>, <0x02350000 0x400>;
|
|
reg-names = "control", "domain";
|
|
domain-id = <0>;
|
|
};
|
|
|
|
clkuart1: clkuart1 {
|
|
#clock-cells = <0>;
|
|
compatible = "ti,keystone,psc-clock";
|
|
clocks = <&clkmodrst0>;
|
|
clock-output-names = "uart1";
|
|
reg = <0x02350000 0xb00>, <0x02350000 0x400>;
|
|
reg-names = "control", "domain";
|
|
domain-id = <0>;
|
|
};
|
|
|
|
clkaemif: clkaemif {
|
|
#clock-cells = <0>;
|
|
compatible = "ti,keystone,psc-clock";
|
|
clocks = <&clkaemifspi>;
|
|
clock-output-names = "aemif";
|
|
reg = <0x02350000 0xb00>, <0x02350000 0x400>;
|
|
reg-names = "control", "domain";
|
|
domain-id = <0>;
|
|
};
|
|
|
|
clkusim: clkusim {
|
|
#clock-cells = <0>;
|
|
compatible = "ti,keystone,psc-clock";
|
|
clocks = <&clkmodrst0>;
|
|
clock-output-names = "usim";
|
|
reg = <0x02350000 0xb00>, <0x02350000 0x400>;
|
|
reg-names = "control", "domain";
|
|
domain-id = <0>;
|
|
};
|
|
|
|
clki2c: clki2c {
|
|
#clock-cells = <0>;
|
|
compatible = "ti,keystone,psc-clock";
|
|
clocks = <&clkmodrst0>;
|
|
clock-output-names = "i2c";
|
|
reg = <0x02350000 0xb00>, <0x02350000 0x400>;
|
|
reg-names = "control", "domain";
|
|
domain-id = <0>;
|
|
};
|
|
|
|
clkspi: clkspi {
|
|
#clock-cells = <0>;
|
|
compatible = "ti,keystone,psc-clock";
|
|
clocks = <&clkaemifspi>;
|
|
clock-output-names = "spi";
|
|
reg = <0x02350000 0xb00>, <0x02350000 0x400>;
|
|
reg-names = "control", "domain";
|
|
domain-id = <0>;
|
|
};
|
|
|
|
clkgpio: clkgpio {
|
|
#clock-cells = <0>;
|
|
compatible = "ti,keystone,psc-clock";
|
|
clocks = <&clkmodrst0>;
|
|
clock-output-names = "gpio";
|
|
reg = <0x02350000 0xb00>, <0x02350000 0x400>;
|
|
reg-names = "control", "domain";
|
|
domain-id = <0>;
|
|
};
|
|
|
|
clkkeymgr: clkkeymgr {
|
|
#clock-cells = <0>;
|
|
compatible = "ti,keystone,psc-clock";
|
|
clocks = <&clkmodrst0>;
|
|
clock-output-names = "keymgr";
|
|
reg = <0x02350000 0xb00>, <0x02350000 0x400>;
|
|
reg-names = "control", "domain";
|
|
domain-id = <0>;
|
|
};
|
|
};
|