Weiyi Lu 51ff86dd10 clk: mediatek: update clock driver of MT2712 ... According to 3rd ECO design change, 1. Add new fixed factor clock of audio. 2. Add the parent clocks for audio clock mux. Signed-off-by: Weiyi Lu <weiyi.lu@mediatek.com> Signed-off-by: Stephen Boyd <sboyd@kernel.org>		2019-02-05 13:28:04 -08:00
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clk-apmixed.c
clk-cpumux.c	clk: mediatek: Drop __init from mtk_clk_register_cpumuxes()	2018-11-30 00:39:19 -08:00
clk-cpumux.h	clk: mediatek: add missing cpu mux causing Mediatek cpufreq can't work	2017-06-19 19:02:43 -07:00
clk-gate.c
clk-gate.h	clk: mediatek: Add MT2701 clock support	2016-11-08 15:59:49 -08:00
clk-mt2701-aud.c
clk-mt2701-bdp.c
clk-mt2701-eth.c
clk-mt2701-g3d.c	clk: mediatek: add g3dsys support for MT2701 and MT7623	2018-05-15 15:21:36 -07:00
clk-mt2701-hif.c	reset: mediatek: Add MT2701 reset driver	2016-11-08 15:59:51 -08:00
clk-mt2701-img.c
clk-mt2701-mm.c
clk-mt2701-vdec.c	clk: mediatek: Add MT2701 clock support	2016-11-08 15:59:49 -08:00
clk-mt2701.c
clk-mt2712-bdp.c
clk-mt2712-img.c
clk-mt2712-jpgdec.c
clk-mt2712-mfg.c
clk-mt2712-mm.c
clk-mt2712-vdec.c
clk-mt2712-venc.c
clk-mt2712.c	clk: mediatek: update clock driver of MT2712	2019-02-05 13:28:04 -08:00
clk-mt6797-img.c
clk-mt6797-mm.c	clk: mediatek: add clk support for MT6797	2017-04-19 09:20:21 -07:00
clk-mt6797-vdec.c
clk-mt6797-venc.c
clk-mt6797.c
clk-mt7622-aud.c
clk-mt7622-eth.c
clk-mt7622-hif.c
clk-mt7622.c	clk: mediatek: Drop more __init markings for driver probe	2018-11-30 00:39:39 -08:00
clk-mt7629-eth.c
clk-mt7629-hif.c
clk-mt7629.c	clk: mediatek: fix the PCIe MAC clock parent	2018-12-05 12:30:30 -08:00
clk-mt8135.c
clk-mt8173.c
clk-mtk.c
clk-mtk.h
clk-pll.c
Kconfig
Makefile
reset.c