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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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7cc8a5e3f5
beat_htab_lock needs to be a real spinlock in RT. Convert it to raw_spinlock. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
443 lines
12 KiB
C
443 lines
12 KiB
C
/*
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* "Cell Reference Set" HTAB support.
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*
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* (C) Copyright 2006-2007 TOSHIBA CORPORATION
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*
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* This code is based on arch/powerpc/platforms/pseries/lpar.c:
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* Copyright (C) 2001 Todd Inglett, IBM Corporation
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
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*/
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#undef DEBUG_LOW
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#include <linux/kernel.h>
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#include <linux/spinlock.h>
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#include <asm/mmu.h>
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#include <asm/page.h>
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#include <asm/pgtable.h>
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#include <asm/machdep.h>
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#include <asm/udbg.h>
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#include "beat_wrapper.h"
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#ifdef DEBUG_LOW
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#define DBG_LOW(fmt...) do { udbg_printf(fmt); } while (0)
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#else
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#define DBG_LOW(fmt...) do { } while (0)
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#endif
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static DEFINE_RAW_SPINLOCK(beat_htab_lock);
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static inline unsigned int beat_read_mask(unsigned hpte_group)
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{
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unsigned long rmask = 0;
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u64 hpte_v[5];
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beat_read_htab_entries(0, hpte_group + 0, hpte_v);
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if (!(hpte_v[0] & HPTE_V_BOLTED))
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rmask |= 0x8000;
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if (!(hpte_v[1] & HPTE_V_BOLTED))
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rmask |= 0x4000;
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if (!(hpte_v[2] & HPTE_V_BOLTED))
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rmask |= 0x2000;
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if (!(hpte_v[3] & HPTE_V_BOLTED))
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rmask |= 0x1000;
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beat_read_htab_entries(0, hpte_group + 4, hpte_v);
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if (!(hpte_v[0] & HPTE_V_BOLTED))
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rmask |= 0x0800;
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if (!(hpte_v[1] & HPTE_V_BOLTED))
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rmask |= 0x0400;
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if (!(hpte_v[2] & HPTE_V_BOLTED))
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rmask |= 0x0200;
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if (!(hpte_v[3] & HPTE_V_BOLTED))
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rmask |= 0x0100;
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hpte_group = ~hpte_group & (htab_hash_mask * HPTES_PER_GROUP);
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beat_read_htab_entries(0, hpte_group + 0, hpte_v);
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if (!(hpte_v[0] & HPTE_V_BOLTED))
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rmask |= 0x80;
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if (!(hpte_v[1] & HPTE_V_BOLTED))
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rmask |= 0x40;
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if (!(hpte_v[2] & HPTE_V_BOLTED))
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rmask |= 0x20;
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if (!(hpte_v[3] & HPTE_V_BOLTED))
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rmask |= 0x10;
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beat_read_htab_entries(0, hpte_group + 4, hpte_v);
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if (!(hpte_v[0] & HPTE_V_BOLTED))
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rmask |= 0x08;
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if (!(hpte_v[1] & HPTE_V_BOLTED))
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rmask |= 0x04;
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if (!(hpte_v[2] & HPTE_V_BOLTED))
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rmask |= 0x02;
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if (!(hpte_v[3] & HPTE_V_BOLTED))
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rmask |= 0x01;
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return rmask;
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}
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static long beat_lpar_hpte_insert(unsigned long hpte_group,
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unsigned long va, unsigned long pa,
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unsigned long rflags, unsigned long vflags,
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int psize, int ssize)
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{
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unsigned long lpar_rc;
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u64 hpte_v, hpte_r, slot;
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/* same as iseries */
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if (vflags & HPTE_V_SECONDARY)
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return -1;
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if (!(vflags & HPTE_V_BOLTED))
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DBG_LOW("hpte_insert(group=%lx, va=%016lx, pa=%016lx, "
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"rflags=%lx, vflags=%lx, psize=%d)\n",
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hpte_group, va, pa, rflags, vflags, psize);
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hpte_v = hpte_encode_v(va, psize, MMU_SEGSIZE_256M) |
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vflags | HPTE_V_VALID;
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hpte_r = hpte_encode_r(pa, psize) | rflags;
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if (!(vflags & HPTE_V_BOLTED))
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DBG_LOW(" hpte_v=%016lx, hpte_r=%016lx\n", hpte_v, hpte_r);
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if (rflags & _PAGE_NO_CACHE)
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hpte_r &= ~_PAGE_COHERENT;
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raw_spin_lock(&beat_htab_lock);
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lpar_rc = beat_read_mask(hpte_group);
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if (lpar_rc == 0) {
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if (!(vflags & HPTE_V_BOLTED))
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DBG_LOW(" full\n");
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raw_spin_unlock(&beat_htab_lock);
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return -1;
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}
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lpar_rc = beat_insert_htab_entry(0, hpte_group, lpar_rc << 48,
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hpte_v, hpte_r, &slot);
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raw_spin_unlock(&beat_htab_lock);
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/*
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* Since we try and ioremap PHBs we don't own, the pte insert
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* will fail. However we must catch the failure in hash_page
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* or we will loop forever, so return -2 in this case.
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*/
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if (unlikely(lpar_rc != 0)) {
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if (!(vflags & HPTE_V_BOLTED))
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DBG_LOW(" lpar err %lx\n", lpar_rc);
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return -2;
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}
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if (!(vflags & HPTE_V_BOLTED))
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DBG_LOW(" -> slot: %lx\n", slot);
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/* We have to pass down the secondary bucket bit here as well */
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return (slot ^ hpte_group) & 15;
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}
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static long beat_lpar_hpte_remove(unsigned long hpte_group)
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{
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DBG_LOW("hpte_remove(group=%lx)\n", hpte_group);
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return -1;
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}
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static unsigned long beat_lpar_hpte_getword0(unsigned long slot)
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{
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unsigned long dword0;
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unsigned long lpar_rc;
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u64 dword[5];
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lpar_rc = beat_read_htab_entries(0, slot & ~3UL, dword);
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dword0 = dword[slot&3];
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BUG_ON(lpar_rc != 0);
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return dword0;
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}
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static void beat_lpar_hptab_clear(void)
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{
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unsigned long size_bytes = 1UL << ppc64_pft_size;
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unsigned long hpte_count = size_bytes >> 4;
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int i;
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u64 dummy0, dummy1;
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/* TODO: Use bulk call */
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for (i = 0; i < hpte_count; i++)
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beat_write_htab_entry(0, i, 0, 0, -1UL, -1UL, &dummy0, &dummy1);
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}
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/*
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* NOTE: for updatepp ops we are fortunate that the linux "newpp" bits and
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* the low 3 bits of flags happen to line up. So no transform is needed.
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* We can probably optimize here and assume the high bits of newpp are
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* already zero. For now I am paranoid.
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*/
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static long beat_lpar_hpte_updatepp(unsigned long slot,
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unsigned long newpp,
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unsigned long va,
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int psize, int ssize, int local)
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{
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unsigned long lpar_rc;
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u64 dummy0, dummy1;
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unsigned long want_v;
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want_v = hpte_encode_v(va, psize, MMU_SEGSIZE_256M);
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DBG_LOW(" update: "
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"avpnv=%016lx, slot=%016lx, psize: %d, newpp %016lx ... ",
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want_v & HPTE_V_AVPN, slot, psize, newpp);
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raw_spin_lock(&beat_htab_lock);
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dummy0 = beat_lpar_hpte_getword0(slot);
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if ((dummy0 & ~0x7FUL) != (want_v & ~0x7FUL)) {
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DBG_LOW("not found !\n");
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raw_spin_unlock(&beat_htab_lock);
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return -1;
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}
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lpar_rc = beat_write_htab_entry(0, slot, 0, newpp, 0, 7, &dummy0,
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&dummy1);
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raw_spin_unlock(&beat_htab_lock);
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if (lpar_rc != 0 || dummy0 == 0) {
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DBG_LOW("not found !\n");
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return -1;
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}
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DBG_LOW("ok %lx %lx\n", dummy0, dummy1);
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BUG_ON(lpar_rc != 0);
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return 0;
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}
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static long beat_lpar_hpte_find(unsigned long va, int psize)
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{
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unsigned long hash;
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unsigned long i, j;
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long slot;
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unsigned long want_v, hpte_v;
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hash = hpt_hash(va, mmu_psize_defs[psize].shift, MMU_SEGSIZE_256M);
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want_v = hpte_encode_v(va, psize, MMU_SEGSIZE_256M);
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for (j = 0; j < 2; j++) {
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slot = (hash & htab_hash_mask) * HPTES_PER_GROUP;
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for (i = 0; i < HPTES_PER_GROUP; i++) {
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hpte_v = beat_lpar_hpte_getword0(slot);
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if (HPTE_V_COMPARE(hpte_v, want_v)
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&& (hpte_v & HPTE_V_VALID)
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&& (!!(hpte_v & HPTE_V_SECONDARY) == j)) {
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/* HPTE matches */
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if (j)
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slot = -slot;
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return slot;
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}
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++slot;
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}
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hash = ~hash;
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}
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return -1;
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}
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static void beat_lpar_hpte_updateboltedpp(unsigned long newpp,
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unsigned long ea,
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int psize, int ssize)
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{
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unsigned long lpar_rc, slot, vsid, va;
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u64 dummy0, dummy1;
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vsid = get_kernel_vsid(ea, MMU_SEGSIZE_256M);
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va = (vsid << 28) | (ea & 0x0fffffff);
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raw_spin_lock(&beat_htab_lock);
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slot = beat_lpar_hpte_find(va, psize);
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BUG_ON(slot == -1);
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lpar_rc = beat_write_htab_entry(0, slot, 0, newpp, 0, 7,
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&dummy0, &dummy1);
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raw_spin_unlock(&beat_htab_lock);
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BUG_ON(lpar_rc != 0);
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}
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static void beat_lpar_hpte_invalidate(unsigned long slot, unsigned long va,
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int psize, int ssize, int local)
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{
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unsigned long want_v;
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unsigned long lpar_rc;
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u64 dummy1, dummy2;
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unsigned long flags;
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DBG_LOW(" inval : slot=%lx, va=%016lx, psize: %d, local: %d\n",
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slot, va, psize, local);
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want_v = hpte_encode_v(va, psize, MMU_SEGSIZE_256M);
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raw_spin_lock_irqsave(&beat_htab_lock, flags);
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dummy1 = beat_lpar_hpte_getword0(slot);
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if ((dummy1 & ~0x7FUL) != (want_v & ~0x7FUL)) {
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DBG_LOW("not found !\n");
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raw_spin_unlock_irqrestore(&beat_htab_lock, flags);
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return;
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}
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lpar_rc = beat_write_htab_entry(0, slot, 0, 0, HPTE_V_VALID, 0,
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&dummy1, &dummy2);
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raw_spin_unlock_irqrestore(&beat_htab_lock, flags);
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BUG_ON(lpar_rc != 0);
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}
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void __init hpte_init_beat(void)
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{
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ppc_md.hpte_invalidate = beat_lpar_hpte_invalidate;
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ppc_md.hpte_updatepp = beat_lpar_hpte_updatepp;
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ppc_md.hpte_updateboltedpp = beat_lpar_hpte_updateboltedpp;
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ppc_md.hpte_insert = beat_lpar_hpte_insert;
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ppc_md.hpte_remove = beat_lpar_hpte_remove;
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ppc_md.hpte_clear_all = beat_lpar_hptab_clear;
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}
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static long beat_lpar_hpte_insert_v3(unsigned long hpte_group,
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unsigned long va, unsigned long pa,
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unsigned long rflags, unsigned long vflags,
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int psize, int ssize)
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{
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unsigned long lpar_rc;
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u64 hpte_v, hpte_r, slot;
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/* same as iseries */
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if (vflags & HPTE_V_SECONDARY)
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return -1;
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if (!(vflags & HPTE_V_BOLTED))
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DBG_LOW("hpte_insert(group=%lx, va=%016lx, pa=%016lx, "
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"rflags=%lx, vflags=%lx, psize=%d)\n",
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hpte_group, va, pa, rflags, vflags, psize);
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hpte_v = hpte_encode_v(va, psize, MMU_SEGSIZE_256M) |
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vflags | HPTE_V_VALID;
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hpte_r = hpte_encode_r(pa, psize) | rflags;
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if (!(vflags & HPTE_V_BOLTED))
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DBG_LOW(" hpte_v=%016lx, hpte_r=%016lx\n", hpte_v, hpte_r);
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if (rflags & _PAGE_NO_CACHE)
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hpte_r &= ~_PAGE_COHERENT;
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/* insert into not-volted entry */
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lpar_rc = beat_insert_htab_entry3(0, hpte_group, hpte_v, hpte_r,
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HPTE_V_BOLTED, 0, &slot);
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/*
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* Since we try and ioremap PHBs we don't own, the pte insert
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* will fail. However we must catch the failure in hash_page
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* or we will loop forever, so return -2 in this case.
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*/
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if (unlikely(lpar_rc != 0)) {
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if (!(vflags & HPTE_V_BOLTED))
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DBG_LOW(" lpar err %lx\n", lpar_rc);
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return -2;
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}
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if (!(vflags & HPTE_V_BOLTED))
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DBG_LOW(" -> slot: %lx\n", slot);
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/* We have to pass down the secondary bucket bit here as well */
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return (slot ^ hpte_group) & 15;
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}
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/*
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* NOTE: for updatepp ops we are fortunate that the linux "newpp" bits and
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* the low 3 bits of flags happen to line up. So no transform is needed.
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* We can probably optimize here and assume the high bits of newpp are
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* already zero. For now I am paranoid.
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*/
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static long beat_lpar_hpte_updatepp_v3(unsigned long slot,
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unsigned long newpp,
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unsigned long va,
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int psize, int ssize, int local)
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{
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unsigned long lpar_rc;
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unsigned long want_v;
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unsigned long pss;
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want_v = hpte_encode_v(va, psize, MMU_SEGSIZE_256M);
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pss = (psize == MMU_PAGE_4K) ? -1UL : mmu_psize_defs[psize].penc;
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DBG_LOW(" update: "
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"avpnv=%016lx, slot=%016lx, psize: %d, newpp %016lx ... ",
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want_v & HPTE_V_AVPN, slot, psize, newpp);
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lpar_rc = beat_update_htab_permission3(0, slot, want_v, pss, 7, newpp);
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if (lpar_rc == 0xfffffff7) {
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DBG_LOW("not found !\n");
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return -1;
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}
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DBG_LOW("ok\n");
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BUG_ON(lpar_rc != 0);
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return 0;
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}
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static void beat_lpar_hpte_invalidate_v3(unsigned long slot, unsigned long va,
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int psize, int ssize, int local)
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{
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unsigned long want_v;
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unsigned long lpar_rc;
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unsigned long pss;
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DBG_LOW(" inval : slot=%lx, va=%016lx, psize: %d, local: %d\n",
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slot, va, psize, local);
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want_v = hpte_encode_v(va, psize, MMU_SEGSIZE_256M);
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pss = (psize == MMU_PAGE_4K) ? -1UL : mmu_psize_defs[psize].penc;
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lpar_rc = beat_invalidate_htab_entry3(0, slot, want_v, pss);
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/* E_busy can be valid output: page may be already replaced */
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BUG_ON(lpar_rc != 0 && lpar_rc != 0xfffffff7);
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}
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static int64_t _beat_lpar_hptab_clear_v3(void)
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{
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return beat_clear_htab3(0);
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}
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static void beat_lpar_hptab_clear_v3(void)
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{
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_beat_lpar_hptab_clear_v3();
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}
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void __init hpte_init_beat_v3(void)
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{
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if (_beat_lpar_hptab_clear_v3() == 0) {
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ppc_md.hpte_invalidate = beat_lpar_hpte_invalidate_v3;
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ppc_md.hpte_updatepp = beat_lpar_hpte_updatepp_v3;
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ppc_md.hpte_updateboltedpp = beat_lpar_hpte_updateboltedpp;
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ppc_md.hpte_insert = beat_lpar_hpte_insert_v3;
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ppc_md.hpte_remove = beat_lpar_hpte_remove;
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ppc_md.hpte_clear_all = beat_lpar_hptab_clear_v3;
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} else {
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ppc_md.hpte_invalidate = beat_lpar_hpte_invalidate;
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ppc_md.hpte_updatepp = beat_lpar_hpte_updatepp;
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ppc_md.hpte_updateboltedpp = beat_lpar_hpte_updateboltedpp;
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ppc_md.hpte_insert = beat_lpar_hpte_insert;
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ppc_md.hpte_remove = beat_lpar_hpte_remove;
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ppc_md.hpte_clear_all = beat_lpar_hptab_clear;
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}
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}
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