mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-27 18:45:02 +07:00
00e729c933
These are as usual a very large number of mostly boring updates to
enable devices in existing machines, or to fix minor bugs. Notably,
an ongoing treewide effort to fix warnings caused by an update to the
device tree compiler. These are enabled with "make W=1" at the moment
but can hopefully become the default once all issues have been addressed.
No new SoC platform is added this time around (Armada 395 and Orion
mv88f5181 are slight variations of existing ones), but a significant
number of new dts files are added, which I list by platform:
- Allwinner: Empire Electronix M712 and iNet d978 Rev2 tablets;
Orange Pi PC Plus, Orange Pi 2, Orange Pi Plus 2E,
Orange Pi Lite, Olimex A33-Olinuxino, and Nano Pi Neo
single-board computers
- ARM Realview: all supported machines (ported from board files)
- Broadcom: BCM958525er, BCM958522er, BCM988312hr, BCM958623hr and
BCM958622hr reference boards for Northstar platform;
Raspberry Pi Zero single-board computer
- Marvell EBU: Netgear WNR854T router (ported from board file);
Armada 395 SoC platform and GP board
Armada 390 DB development board
- NXP i.MX: imx7s Warp7 reference board;
Gateworks Ventana GW553x single-board computer,
Technologic Systems TS-4900 and
Engicam IMX6UL GEA M6UL computer-on-module,
Inverse Path USB armory board
- Qualcomm: LG Nexus 5 Phone
- Renesas: r8a7792/wheat and r7s72100/rskrza1 development boards
- Rockchip: Rockchip RK3288 Fennec reference board;
Firefly RK3288 Reload platform
- ST Microelectronics STi: B2260 (96boards) single-board computer
- TI Davinci: OMAP-L138 LCDK Development kit
- TI OMAP: beagleboard-x15 rev B1 single-board computer
Conflicts: vendor-prefixes.txt has conflicting additions, keep all of
them in alphabetical order.
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Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM DT updates from Arnd Bergmann:
"These are as usual a very large number of mostly boring updates to
enable devices in existing machines, or to fix minor bugs. Notably, an
ongoing treewide effort to fix warnings caused by an update to the
device tree compiler. These are enabled with "make W=1" at the moment
but can hopefully become the default once all issues have been
addressed.
No new SoC platform is added this time around (Armada 395 and Orion
mv88f5181 are slight variations of existing ones), but a significant
number of new dts files are added, which I list by platform:
- Allwinner: Empire Electronix M712 and iNet d978 Rev2 tablets,
Orange Pi PC Plus, Orange Pi 2, Orange Pi Plus 2E, Orange Pi Lite,
Olimex A33-Olinuxino, and Nano Pi Neo single-board computers
- ARM Realview: all supported machines (ported from board files)
- Broadcom: BCM958525er, BCM958522er, BCM988312hr, BCM958623hr and
BCM958622hr reference boards for Northstar platform, Raspberry Pi
Zero single-board computer
- Marvell EBU: Netgear WNR854T router (ported from board file),
Armada 395 SoC platform and GP board Armada 390 DB development
board
- NXP i.MX: imx7s Warp7 reference board, Gateworks Ventana GW553x
single-board computer, Technologic Systems TS-4900 and Engicam
IMX6UL GEA M6UL computer-on-module, Inverse Path USB armory board
- Qualcomm: LG Nexus 5 Phone
- Renesas: r8a7792/wheat and r7s72100/rskrza1 development boards
- Rockchip: Rockchip RK3288 Fennec reference board, Firefly RK3288
Reload platform
- ST Microelectronics STi: B2260 (96boards) single-board computer
- TI Davinci: OMAP-L138 LCDK Development kit
- TI OMAP: beagleboard-x15 rev B1 single-board computer"
* tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (390 commits)
ARM: dts: sony-nsz-gs7: add missing unit name to /memory node
ARM: dts: chromecast: add missing unit name to /memory node
ARM: dts: berlin2q-marvell-dmp: add missing unit name to /memory node
ARM: dts: berlin2: Add missing unit name to /soc node
ARM: dts: berlin2cd: Add missing unit name to /soc node
ARM: dts: berlin2q: Add missing unit name to /soc node
ARM: dts: berlin2: Remove skeleton.dtsi inclusion
ARM: dts: berlin2cd: Remove skeleton.dtsi inclusion
ARM: dts: berlin2q: Remove skeleton.dtsi inclusion
arm: dts: berlin2q: enable all wdt nodes unconditionally
arm: dts: berlin2: enable all wdt nodes unconditionally
ARM: dts: omap5-igep0050.dts: Use tabs for indentation
ARM: dts: Fix igepv5 power button GPIO direction
ARM: dts: am335x-evmsk: Add blue-and-red-wiring -property to lcdc node
ARM: dts: am335x-evmsk: Whitespace cleanup of lcdc related nodes
ARM: dts: am335x-evm: Add blue-and-red-wiring -property to lcdc node
ARM: dts: s3c64xx: Use macros for pinctrl configuration
ARM: dts: s3c2416: Use macros for pinctrl configuration
ARM: dts: s5pv210: Use macros for pinctrl configuration
ARM: dts: s3c64xx: Use common macros for pinctrl configuration
...
414 lines
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414 lines
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/*
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* Copyright 2015 - Maxime Coquelin <mcoquelin.stm32@gmail.com>
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*
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* This file is dual-licensed: you can use it either under the terms
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* of the GPL or the X11 license, at your option. Note that this dual
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* licensing only applies to this file, and not this project as a
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* whole.
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*
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* a) This file is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of the
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* License, or (at your option) any later version.
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*
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* This file is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public
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* License along with this file; if not, write to the Free
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* Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
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* MA 02110-1301 USA
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*
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* Or, alternatively,
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*
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* b) Permission is hereby granted, free of charge, to any person
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* obtaining a copy of this software and associated documentation
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* files (the "Software"), to deal in the Software without
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* restriction, including without limitation the rights to use,
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* copy, modify, merge, publish, distribute, sublicense, and/or
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* sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following
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* conditions:
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*
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* The above copyright notice and this permission notice shall be
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* included in all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
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* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
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* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
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* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*/
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#include "skeleton.dtsi"
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#include "armv7-m.dtsi"
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#include <dt-bindings/pinctrl/stm32f429-pinfunc.h>
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/ {
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clocks {
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clk_hse: clk-hse {
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#clock-cells = <0>;
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compatible = "fixed-clock";
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clock-frequency = <0>;
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};
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};
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soc {
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dma-ranges = <0xc0000000 0x0 0x10000000>;
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timer2: timer@40000000 {
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compatible = "st,stm32-timer";
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reg = <0x40000000 0x400>;
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interrupts = <28>;
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clocks = <&rcc 0 128>;
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status = "disabled";
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};
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timer3: timer@40000400 {
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compatible = "st,stm32-timer";
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reg = <0x40000400 0x400>;
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interrupts = <29>;
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clocks = <&rcc 0 129>;
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status = "disabled";
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};
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timer4: timer@40000800 {
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compatible = "st,stm32-timer";
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reg = <0x40000800 0x400>;
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interrupts = <30>;
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clocks = <&rcc 0 130>;
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status = "disabled";
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};
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timer5: timer@40000c00 {
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compatible = "st,stm32-timer";
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reg = <0x40000c00 0x400>;
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interrupts = <50>;
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clocks = <&rcc 0 131>;
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};
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timer6: timer@40001000 {
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compatible = "st,stm32-timer";
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reg = <0x40001000 0x400>;
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interrupts = <54>;
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clocks = <&rcc 0 132>;
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status = "disabled";
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};
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timer7: timer@40001400 {
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compatible = "st,stm32-timer";
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reg = <0x40001400 0x400>;
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interrupts = <55>;
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clocks = <&rcc 0 133>;
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status = "disabled";
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};
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usart2: serial@40004400 {
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compatible = "st,stm32-usart", "st,stm32-uart";
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reg = <0x40004400 0x400>;
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interrupts = <38>;
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clocks = <&rcc 0 145>;
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status = "disabled";
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};
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usart3: serial@40004800 {
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compatible = "st,stm32-usart", "st,stm32-uart";
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reg = <0x40004800 0x400>;
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interrupts = <39>;
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clocks = <&rcc 0 146>;
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status = "disabled";
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};
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usart4: serial@40004c00 {
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compatible = "st,stm32-uart";
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reg = <0x40004c00 0x400>;
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interrupts = <52>;
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clocks = <&rcc 0 147>;
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status = "disabled";
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};
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usart5: serial@40005000 {
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compatible = "st,stm32-uart";
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reg = <0x40005000 0x400>;
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interrupts = <53>;
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clocks = <&rcc 0 148>;
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status = "disabled";
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};
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usart7: serial@40007800 {
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compatible = "st,stm32-usart", "st,stm32-uart";
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reg = <0x40007800 0x400>;
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interrupts = <82>;
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clocks = <&rcc 0 158>;
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status = "disabled";
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};
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usart8: serial@40007c00 {
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compatible = "st,stm32-usart", "st,stm32-uart";
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reg = <0x40007c00 0x400>;
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interrupts = <83>;
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clocks = <&rcc 0 159>;
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status = "disabled";
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};
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usart1: serial@40011000 {
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compatible = "st,stm32-usart", "st,stm32-uart";
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reg = <0x40011000 0x400>;
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interrupts = <37>;
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clocks = <&rcc 0 164>;
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status = "disabled";
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};
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usart6: serial@40011400 {
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compatible = "st,stm32-usart", "st,stm32-uart";
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reg = <0x40011400 0x400>;
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interrupts = <71>;
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clocks = <&rcc 0 165>;
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status = "disabled";
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};
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syscfg: system-config@40013800 {
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compatible = "syscon";
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reg = <0x40013800 0x400>;
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};
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exti: interrupt-controller@40013c00 {
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compatible = "st,stm32-exti";
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interrupt-controller;
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#interrupt-cells = <2>;
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reg = <0x40013C00 0x400>;
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interrupts = <1>, <2>, <3>, <6>, <7>, <8>, <9>, <10>, <23>, <40>, <41>, <42>, <62>, <76>;
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};
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pin-controller {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "st,stm32f429-pinctrl";
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ranges = <0 0x40020000 0x3000>;
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pins-are-numbered;
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gpioa: gpio@40020000 {
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gpio-controller;
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#gpio-cells = <2>;
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reg = <0x0 0x400>;
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clocks = <&rcc 0 0>;
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st,bank-name = "GPIOA";
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};
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gpiob: gpio@40020400 {
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gpio-controller;
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#gpio-cells = <2>;
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reg = <0x400 0x400>;
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clocks = <&rcc 0 1>;
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st,bank-name = "GPIOB";
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};
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gpioc: gpio@40020800 {
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gpio-controller;
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#gpio-cells = <2>;
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reg = <0x800 0x400>;
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clocks = <&rcc 0 2>;
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st,bank-name = "GPIOC";
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};
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gpiod: gpio@40020c00 {
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gpio-controller;
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#gpio-cells = <2>;
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reg = <0xc00 0x400>;
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clocks = <&rcc 0 3>;
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st,bank-name = "GPIOD";
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};
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gpioe: gpio@40021000 {
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gpio-controller;
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#gpio-cells = <2>;
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reg = <0x1000 0x400>;
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clocks = <&rcc 0 4>;
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st,bank-name = "GPIOE";
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};
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gpiof: gpio@40021400 {
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gpio-controller;
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#gpio-cells = <2>;
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reg = <0x1400 0x400>;
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clocks = <&rcc 0 5>;
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st,bank-name = "GPIOF";
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};
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gpiog: gpio@40021800 {
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gpio-controller;
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#gpio-cells = <2>;
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reg = <0x1800 0x400>;
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clocks = <&rcc 0 6>;
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st,bank-name = "GPIOG";
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};
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gpioh: gpio@40021c00 {
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gpio-controller;
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#gpio-cells = <2>;
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reg = <0x1c00 0x400>;
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clocks = <&rcc 0 7>;
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st,bank-name = "GPIOH";
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};
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gpioi: gpio@40022000 {
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gpio-controller;
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#gpio-cells = <2>;
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reg = <0x2000 0x400>;
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clocks = <&rcc 0 8>;
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st,bank-name = "GPIOI";
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};
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gpioj: gpio@40022400 {
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gpio-controller;
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#gpio-cells = <2>;
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reg = <0x2400 0x400>;
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clocks = <&rcc 0 9>;
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st,bank-name = "GPIOJ";
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};
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gpiok: gpio@40022800 {
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gpio-controller;
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#gpio-cells = <2>;
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reg = <0x2800 0x400>;
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clocks = <&rcc 0 10>;
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st,bank-name = "GPIOK";
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};
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usart1_pins_a: usart1@0 {
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pins1 {
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pinmux = <STM32F429_PA9_FUNC_USART1_TX>;
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bias-disable;
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drive-push-pull;
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slew-rate = <0>;
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};
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pins2 {
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pinmux = <STM32F429_PA10_FUNC_USART1_RX>;
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bias-disable;
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};
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};
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usbotg_hs_pins_a: usbotg_hs@0 {
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pins {
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pinmux = <STM32F429_PH4_FUNC_OTG_HS_ULPI_NXT>,
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<STM32F429_PI11_FUNC_OTG_HS_ULPI_DIR>,
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<STM32F429_PC0_FUNC_OTG_HS_ULPI_STP>,
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<STM32F429_PA5_FUNC_OTG_HS_ULPI_CK>,
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<STM32F429_PA3_FUNC_OTG_HS_ULPI_D0>,
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<STM32F429_PB0_FUNC_OTG_HS_ULPI_D1>,
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<STM32F429_PB1_FUNC_OTG_HS_ULPI_D2>,
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<STM32F429_PB10_FUNC_OTG_HS_ULPI_D3>,
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<STM32F429_PB11_FUNC_OTG_HS_ULPI_D4>,
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<STM32F429_PB12_FUNC_OTG_HS_ULPI_D5>,
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<STM32F429_PB13_FUNC_OTG_HS_ULPI_D6>,
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<STM32F429_PB5_FUNC_OTG_HS_ULPI_D7>;
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bias-disable;
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drive-push-pull;
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slew-rate = <2>;
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};
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};
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ethernet0_mii: mii@0 {
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pins {
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pinmux = <STM32F429_PG13_FUNC_ETH_MII_TXD0_ETH_RMII_TXD0>,
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<STM32F429_PG14_FUNC_ETH_MII_TXD1_ETH_RMII_TXD1>,
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<STM32F429_PC2_FUNC_ETH_MII_TXD2>,
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<STM32F429_PB8_FUNC_ETH_MII_TXD3>,
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<STM32F429_PC3_FUNC_ETH_MII_TX_CLK>,
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<STM32F429_PG11_FUNC_ETH_MII_TX_EN_ETH_RMII_TX_EN>,
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<STM32F429_PA2_FUNC_ETH_MDIO>,
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<STM32F429_PC1_FUNC_ETH_MDC>,
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<STM32F429_PA1_FUNC_ETH_MII_RX_CLK_ETH_RMII_REF_CLK>,
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<STM32F429_PA7_FUNC_ETH_MII_RX_DV_ETH_RMII_CRS_DV>,
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<STM32F429_PC4_FUNC_ETH_MII_RXD0_ETH_RMII_RXD0>,
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<STM32F429_PC5_FUNC_ETH_MII_RXD1_ETH_RMII_RXD1>,
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<STM32F429_PH6_FUNC_ETH_MII_RXD2>,
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<STM32F429_PH7_FUNC_ETH_MII_RXD3>;
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slew-rate = <2>;
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};
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};
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};
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rcc: rcc@40023810 {
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#reset-cells = <1>;
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#clock-cells = <2>;
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compatible = "st,stm32f42xx-rcc", "st,stm32-rcc";
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reg = <0x40023800 0x400>;
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clocks = <&clk_hse>;
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};
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dma1: dma-controller@40026000 {
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compatible = "st,stm32-dma";
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reg = <0x40026000 0x400>;
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interrupts = <11>,
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<12>,
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<13>,
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<14>,
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<15>,
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<16>,
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<17>,
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<47>;
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clocks = <&rcc 0 21>;
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#dma-cells = <4>;
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};
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dma2: dma-controller@40026400 {
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compatible = "st,stm32-dma";
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reg = <0x40026400 0x400>;
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interrupts = <56>,
|
|
<57>,
|
|
<58>,
|
|
<59>,
|
|
<60>,
|
|
<68>,
|
|
<69>,
|
|
<70>;
|
|
clocks = <&rcc 0 22>;
|
|
#dma-cells = <4>;
|
|
st,mem2mem;
|
|
};
|
|
|
|
ethernet0: dwmac@40028000 {
|
|
compatible = "st,stm32-dwmac", "snps,dwmac-3.50a";
|
|
reg = <0x40028000 0x8000>;
|
|
reg-names = "stmmaceth";
|
|
interrupts = <61>, <62>;
|
|
interrupt-names = "macirq", "eth_wake_irq";
|
|
clock-names = "stmmaceth", "tx-clk", "rx-clk";
|
|
clocks = <&rcc 0 25>, <&rcc 0 26>, <&rcc 0 27>;
|
|
st,syscon = <&syscfg 0x4>;
|
|
snps,pbl = <8>;
|
|
snps,mixed-burst;
|
|
dma-ranges;
|
|
status = "disabled";
|
|
};
|
|
|
|
usbotg_hs: usb@40040000 {
|
|
compatible = "snps,dwc2";
|
|
dma-ranges;
|
|
reg = <0x40040000 0x40000>;
|
|
interrupts = <77>;
|
|
clocks = <&rcc 0 29>;
|
|
clock-names = "otg";
|
|
status = "disabled";
|
|
};
|
|
|
|
rng: rng@50060800 {
|
|
compatible = "st,stm32-rng";
|
|
reg = <0x50060800 0x400>;
|
|
interrupts = <80>;
|
|
clocks = <&rcc 0 38>;
|
|
};
|
|
};
|
|
};
|
|
|
|
&systick {
|
|
clocks = <&rcc 1 0>;
|
|
status = "okay";
|
|
};
|