Yong Zhao 51ac7eec62 drm/amdgpu: Support IOMMU on Raven ... We achieved that by setting S(SYSTEM) and P(PDE as PTE) bit to 1 for PDEs and setting S bit to 1 for PTEs when the corresponding addresses are not occupied by gpu driver allocated buffers. Signed-off-by: Yong Zhao <Yong.Zhao@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>		2017-08-15 14:45:58 -04:00
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drm	drm/amdgpu: Support IOMMU on Raven	2017-08-15 14:45:58 -04:00
host1x	gpu/host1x: Remove excess parameter in host1x_subdev_add docs	2017-07-31 14:24:37 +02:00
ipu-v3	drm: Convert to using %pOF instead of full_name	2017-07-26 13:45:06 +02:00
vga	sched/wait: Rename wait_queue_t => wait_queue_entry_t	2017-06-20 12:18:27 +02:00
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