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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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517f43e5a9
The chip common and mips core have to be setup early in the boot process to get the cpu clock. bcma_bus_early_register() gets pointers to some space to store the core data and searches for the chip common and mips core and initializes chip common. After that was done and the kernel is out of early boot we just have to run bcma_bus_register() and it will search for the other cores, initialize and register them. The cores are getting the same numbers as before. Acked-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> Acked-by: Ralf Baechle <ralf@linux-mips.org> Signed-off-by: John W. Linville <linville@tuxdriver.com>
273 lines
7.8 KiB
C
273 lines
7.8 KiB
C
#ifndef LINUX_BCMA_H_
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#define LINUX_BCMA_H_
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#include <linux/pci.h>
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#include <linux/mod_devicetable.h>
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#include <linux/bcma/bcma_driver_chipcommon.h>
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#include <linux/bcma/bcma_driver_pci.h>
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#include <linux/ssb/ssb.h> /* SPROM sharing */
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#include "bcma_regs.h"
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struct bcma_device;
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struct bcma_bus;
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enum bcma_hosttype {
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BCMA_HOSTTYPE_NONE,
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BCMA_HOSTTYPE_PCI,
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BCMA_HOSTTYPE_SDIO,
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};
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struct bcma_chipinfo {
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u16 id;
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u8 rev;
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u8 pkg;
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};
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enum bcma_clkmode {
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BCMA_CLKMODE_FAST,
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BCMA_CLKMODE_DYNAMIC,
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};
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struct bcma_host_ops {
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u8 (*read8)(struct bcma_device *core, u16 offset);
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u16 (*read16)(struct bcma_device *core, u16 offset);
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u32 (*read32)(struct bcma_device *core, u16 offset);
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void (*write8)(struct bcma_device *core, u16 offset, u8 value);
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void (*write16)(struct bcma_device *core, u16 offset, u16 value);
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void (*write32)(struct bcma_device *core, u16 offset, u32 value);
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#ifdef CONFIG_BCMA_BLOCKIO
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void (*block_read)(struct bcma_device *core, void *buffer,
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size_t count, u16 offset, u8 reg_width);
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void (*block_write)(struct bcma_device *core, const void *buffer,
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size_t count, u16 offset, u8 reg_width);
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#endif
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/* Agent ops */
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u32 (*aread32)(struct bcma_device *core, u16 offset);
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void (*awrite32)(struct bcma_device *core, u16 offset, u32 value);
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};
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/* Core manufacturers */
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#define BCMA_MANUF_ARM 0x43B
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#define BCMA_MANUF_MIPS 0x4A7
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#define BCMA_MANUF_BCM 0x4BF
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/* Core class values. */
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#define BCMA_CL_SIM 0x0
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#define BCMA_CL_EROM 0x1
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#define BCMA_CL_CORESIGHT 0x9
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#define BCMA_CL_VERIF 0xB
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#define BCMA_CL_OPTIMO 0xD
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#define BCMA_CL_GEN 0xE
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#define BCMA_CL_PRIMECELL 0xF
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/* Core-ID values. */
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#define BCMA_CORE_OOB_ROUTER 0x367 /* Out of band */
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#define BCMA_CORE_INVALID 0x700
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#define BCMA_CORE_CHIPCOMMON 0x800
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#define BCMA_CORE_ILINE20 0x801
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#define BCMA_CORE_SRAM 0x802
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#define BCMA_CORE_SDRAM 0x803
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#define BCMA_CORE_PCI 0x804
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#define BCMA_CORE_MIPS 0x805
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#define BCMA_CORE_ETHERNET 0x806
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#define BCMA_CORE_V90 0x807
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#define BCMA_CORE_USB11_HOSTDEV 0x808
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#define BCMA_CORE_ADSL 0x809
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#define BCMA_CORE_ILINE100 0x80A
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#define BCMA_CORE_IPSEC 0x80B
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#define BCMA_CORE_UTOPIA 0x80C
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#define BCMA_CORE_PCMCIA 0x80D
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#define BCMA_CORE_INTERNAL_MEM 0x80E
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#define BCMA_CORE_MEMC_SDRAM 0x80F
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#define BCMA_CORE_OFDM 0x810
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#define BCMA_CORE_EXTIF 0x811
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#define BCMA_CORE_80211 0x812
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#define BCMA_CORE_PHY_A 0x813
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#define BCMA_CORE_PHY_B 0x814
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#define BCMA_CORE_PHY_G 0x815
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#define BCMA_CORE_MIPS_3302 0x816
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#define BCMA_CORE_USB11_HOST 0x817
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#define BCMA_CORE_USB11_DEV 0x818
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#define BCMA_CORE_USB20_HOST 0x819
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#define BCMA_CORE_USB20_DEV 0x81A
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#define BCMA_CORE_SDIO_HOST 0x81B
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#define BCMA_CORE_ROBOSWITCH 0x81C
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#define BCMA_CORE_PARA_ATA 0x81D
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#define BCMA_CORE_SATA_XORDMA 0x81E
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#define BCMA_CORE_ETHERNET_GBIT 0x81F
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#define BCMA_CORE_PCIE 0x820
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#define BCMA_CORE_PHY_N 0x821
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#define BCMA_CORE_SRAM_CTL 0x822
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#define BCMA_CORE_MINI_MACPHY 0x823
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#define BCMA_CORE_ARM_1176 0x824
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#define BCMA_CORE_ARM_7TDMI 0x825
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#define BCMA_CORE_PHY_LP 0x826
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#define BCMA_CORE_PMU 0x827
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#define BCMA_CORE_PHY_SSN 0x828
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#define BCMA_CORE_SDIO_DEV 0x829
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#define BCMA_CORE_ARM_CM3 0x82A
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#define BCMA_CORE_PHY_HT 0x82B
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#define BCMA_CORE_MIPS_74K 0x82C
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#define BCMA_CORE_MAC_GBIT 0x82D
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#define BCMA_CORE_DDR12_MEM_CTL 0x82E
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#define BCMA_CORE_PCIE_RC 0x82F /* PCIe Root Complex */
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#define BCMA_CORE_OCP_OCP_BRIDGE 0x830
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#define BCMA_CORE_SHARED_COMMON 0x831
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#define BCMA_CORE_OCP_AHB_BRIDGE 0x832
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#define BCMA_CORE_SPI_HOST 0x833
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#define BCMA_CORE_I2S 0x834
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#define BCMA_CORE_SDR_DDR1_MEM_CTL 0x835 /* SDR/DDR1 memory controller core */
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#define BCMA_CORE_SHIM 0x837 /* SHIM component in ubus/6362 */
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#define BCMA_CORE_DEFAULT 0xFFF
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#define BCMA_MAX_NR_CORES 16
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struct bcma_device {
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struct bcma_bus *bus;
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struct bcma_device_id id;
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struct device dev;
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struct device *dma_dev;
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unsigned int irq;
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bool dev_registered;
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u8 core_index;
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u32 addr;
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u32 wrap;
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void *drvdata;
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struct list_head list;
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};
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static inline void *bcma_get_drvdata(struct bcma_device *core)
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{
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return core->drvdata;
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}
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static inline void bcma_set_drvdata(struct bcma_device *core, void *drvdata)
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{
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core->drvdata = drvdata;
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}
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struct bcma_driver {
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const char *name;
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const struct bcma_device_id *id_table;
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int (*probe)(struct bcma_device *dev);
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void (*remove)(struct bcma_device *dev);
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int (*suspend)(struct bcma_device *dev, pm_message_t state);
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int (*resume)(struct bcma_device *dev);
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void (*shutdown)(struct bcma_device *dev);
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struct device_driver drv;
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};
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extern
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int __bcma_driver_register(struct bcma_driver *drv, struct module *owner);
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static inline int bcma_driver_register(struct bcma_driver *drv)
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{
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return __bcma_driver_register(drv, THIS_MODULE);
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}
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extern void bcma_driver_unregister(struct bcma_driver *drv);
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struct bcma_bus {
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/* The MMIO area. */
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void __iomem *mmio;
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const struct bcma_host_ops *ops;
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enum bcma_hosttype hosttype;
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union {
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/* Pointer to the PCI bus (only for BCMA_HOSTTYPE_PCI) */
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struct pci_dev *host_pci;
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/* Pointer to the SDIO device (only for BCMA_HOSTTYPE_SDIO) */
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struct sdio_func *host_sdio;
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};
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struct bcma_chipinfo chipinfo;
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struct bcma_device *mapped_core;
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struct list_head cores;
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u8 nr_cores;
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u8 init_done:1;
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struct bcma_drv_cc drv_cc;
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struct bcma_drv_pci drv_pci;
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/* We decided to share SPROM struct with SSB as long as we do not need
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* any hacks for BCMA. This simplifies drivers code. */
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struct ssb_sprom sprom;
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};
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extern inline u32 bcma_read8(struct bcma_device *core, u16 offset)
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{
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return core->bus->ops->read8(core, offset);
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}
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extern inline u32 bcma_read16(struct bcma_device *core, u16 offset)
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{
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return core->bus->ops->read16(core, offset);
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}
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extern inline u32 bcma_read32(struct bcma_device *core, u16 offset)
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{
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return core->bus->ops->read32(core, offset);
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}
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extern inline
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void bcma_write8(struct bcma_device *core, u16 offset, u32 value)
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{
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core->bus->ops->write8(core, offset, value);
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}
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extern inline
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void bcma_write16(struct bcma_device *core, u16 offset, u32 value)
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{
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core->bus->ops->write16(core, offset, value);
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}
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extern inline
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void bcma_write32(struct bcma_device *core, u16 offset, u32 value)
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{
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core->bus->ops->write32(core, offset, value);
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}
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#ifdef CONFIG_BCMA_BLOCKIO
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extern inline void bcma_block_read(struct bcma_device *core, void *buffer,
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size_t count, u16 offset, u8 reg_width)
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{
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core->bus->ops->block_read(core, buffer, count, offset, reg_width);
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}
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extern inline void bcma_block_write(struct bcma_device *core, const void *buffer,
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size_t count, u16 offset, u8 reg_width)
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{
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core->bus->ops->block_write(core, buffer, count, offset, reg_width);
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}
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#endif
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extern inline u32 bcma_aread32(struct bcma_device *core, u16 offset)
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{
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return core->bus->ops->aread32(core, offset);
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}
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extern inline
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void bcma_awrite32(struct bcma_device *core, u16 offset, u32 value)
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{
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core->bus->ops->awrite32(core, offset, value);
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}
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#define bcma_mask32(cc, offset, mask) \
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bcma_write32(cc, offset, bcma_read32(cc, offset) & (mask))
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#define bcma_set32(cc, offset, set) \
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bcma_write32(cc, offset, bcma_read32(cc, offset) | (set))
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#define bcma_maskset32(cc, offset, mask, set) \
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bcma_write32(cc, offset, (bcma_read32(cc, offset) & (mask)) | (set))
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extern bool bcma_core_is_enabled(struct bcma_device *core);
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extern void bcma_core_disable(struct bcma_device *core, u32 flags);
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extern int bcma_core_enable(struct bcma_device *core, u32 flags);
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extern void bcma_core_set_clockmode(struct bcma_device *core,
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enum bcma_clkmode clkmode);
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extern void bcma_core_pll_ctl(struct bcma_device *core, u32 req, u32 status,
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bool on);
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#define BCMA_DMA_TRANSLATION_MASK 0xC0000000
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#define BCMA_DMA_TRANSLATION_NONE 0x00000000
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#define BCMA_DMA_TRANSLATION_DMA32_CMT 0x40000000 /* Client Mode Translation for 32-bit DMA */
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#define BCMA_DMA_TRANSLATION_DMA64_CMT 0x80000000 /* Client Mode Translation for 64-bit DMA */
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extern u32 bcma_core_dma_translation(struct bcma_device *core);
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#endif /* LINUX_BCMA_H_ */
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