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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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8d238e0124
Signed-off-by: Alan Cox <alan@redhat.com> Signed-off-by: Jeff Garzik <jgarzik@pobox.com>
826 lines
23 KiB
C
826 lines
23 KiB
C
/*
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* Copyright 2003-2005 Red Hat, Inc. All rights reserved.
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* Copyright 2003-2005 Jeff Garzik
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*
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2, or (at your option)
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* any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; see the file COPYING. If not, write to
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* the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
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*
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*
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* libata documentation is available via 'make {ps|pdf}docs',
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* as Documentation/DocBook/libata.*
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*
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*/
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#ifndef __LINUX_LIBATA_H__
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#define __LINUX_LIBATA_H__
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#include <linux/delay.h>
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#include <linux/interrupt.h>
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#include <linux/pci.h>
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#include <linux/dma-mapping.h>
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#include <asm/io.h>
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#include <linux/ata.h>
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#include <linux/workqueue.h>
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/*
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* compile-time options
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*/
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#undef ATA_DEBUG /* debugging output */
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#undef ATA_VERBOSE_DEBUG /* yet more debugging output */
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#undef ATA_IRQ_TRAP /* define to ack screaming irqs */
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#undef ATA_NDEBUG /* define to disable quick runtime checks */
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#undef ATA_ENABLE_PATA /* define to enable PATA support in some
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* low-level drivers */
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#undef ATAPI_ENABLE_DMADIR /* enables ATAPI DMADIR bridge support */
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/* note: prints function name for you */
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#ifdef ATA_DEBUG
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#define DPRINTK(fmt, args...) printk(KERN_ERR "%s: " fmt, __FUNCTION__, ## args)
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#ifdef ATA_VERBOSE_DEBUG
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#define VPRINTK(fmt, args...) printk(KERN_ERR "%s: " fmt, __FUNCTION__, ## args)
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#else
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#define VPRINTK(fmt, args...)
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#endif /* ATA_VERBOSE_DEBUG */
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#else
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#define DPRINTK(fmt, args...)
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#define VPRINTK(fmt, args...)
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#endif /* ATA_DEBUG */
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#define BPRINTK(fmt, args...) if (ap->flags & ATA_FLAG_DEBUGMSG) printk(KERN_ERR "%s: " fmt, __FUNCTION__, ## args)
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#ifdef ATA_NDEBUG
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#define assert(expr)
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#else
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#define assert(expr) \
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if(unlikely(!(expr))) { \
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printk(KERN_ERR "Assertion failed! %s,%s,%s,line=%d\n", \
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#expr,__FILE__,__FUNCTION__,__LINE__); \
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}
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#endif
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/* defines only for the constants which don't work well as enums */
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#define ATA_TAG_POISON 0xfafbfcfdU
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/* move to PCI layer? */
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static inline struct device *pci_dev_to_dev(struct pci_dev *pdev)
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{
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return &pdev->dev;
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}
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enum {
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/* various global constants */
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LIBATA_MAX_PRD = ATA_MAX_PRD / 2,
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ATA_MAX_PORTS = 8,
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ATA_DEF_QUEUE = 1,
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ATA_MAX_QUEUE = 1,
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ATA_MAX_SECTORS = 200, /* FIXME */
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ATA_MAX_BUS = 2,
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ATA_DEF_BUSY_WAIT = 10000,
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ATA_SHORT_PAUSE = (HZ >> 6) + 1,
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ATA_SHT_EMULATED = 1,
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ATA_SHT_CMD_PER_LUN = 1,
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ATA_SHT_THIS_ID = -1,
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ATA_SHT_USE_CLUSTERING = 1,
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/* struct ata_device stuff */
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ATA_DFLAG_LBA48 = (1 << 0), /* device supports LBA48 */
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ATA_DFLAG_PIO = (1 << 1), /* device currently in PIO mode */
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ATA_DFLAG_LOCK_SECTORS = (1 << 2), /* don't adjust max_sectors */
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ATA_DFLAG_LBA = (1 << 3), /* device supports LBA */
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ATA_DEV_UNKNOWN = 0, /* unknown device */
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ATA_DEV_ATA = 1, /* ATA device */
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ATA_DEV_ATA_UNSUP = 2, /* ATA device (unsupported) */
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ATA_DEV_ATAPI = 3, /* ATAPI device */
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ATA_DEV_ATAPI_UNSUP = 4, /* ATAPI device (unsupported) */
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ATA_DEV_NONE = 5, /* no device */
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/* struct ata_port flags */
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ATA_FLAG_SLAVE_POSS = (1 << 1), /* host supports slave dev */
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/* (doesn't imply presence) */
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ATA_FLAG_PORT_DISABLED = (1 << 2), /* port is disabled, ignore it */
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ATA_FLAG_SATA = (1 << 3),
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ATA_FLAG_NO_LEGACY = (1 << 4), /* no legacy mode check */
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ATA_FLAG_SRST = (1 << 5), /* use ATA SRST, not E.D.D. */
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ATA_FLAG_MMIO = (1 << 6), /* use MMIO, not PIO */
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ATA_FLAG_SATA_RESET = (1 << 7), /* use COMRESET */
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ATA_FLAG_PIO_DMA = (1 << 8), /* PIO cmds via DMA */
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ATA_FLAG_NOINTR = (1 << 9), /* FIXME: Remove this once
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* proper HSM is in place. */
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ATA_FLAG_DEBUGMSG = (1 << 10),
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ATA_FLAG_NO_ATAPI = (1 << 11), /* No ATAPI support */
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ATA_FLAG_SUSPENDED = (1 << 12), /* port is suspended */
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ATA_FLAG_PIO_LBA48 = (1 << 13), /* Host DMA engine is LBA28 only */
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ATA_FLAG_IRQ_MASK = (1 << 14), /* Mask IRQ in PIO xfers */
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ATA_QCFLAG_ACTIVE = (1 << 1), /* cmd not yet ack'd to scsi lyer */
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ATA_QCFLAG_SG = (1 << 3), /* have s/g table? */
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ATA_QCFLAG_SINGLE = (1 << 4), /* no s/g, just a single buffer */
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ATA_QCFLAG_DMAMAP = ATA_QCFLAG_SG | ATA_QCFLAG_SINGLE,
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/* various lengths of time */
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ATA_TMOUT_EDD = 5 * HZ, /* heuristic */
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ATA_TMOUT_PIO = 30 * HZ,
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ATA_TMOUT_BOOT = 30 * HZ, /* heuristic */
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ATA_TMOUT_BOOT_QUICK = 7 * HZ, /* heuristic */
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ATA_TMOUT_CDB = 30 * HZ,
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ATA_TMOUT_CDB_QUICK = 5 * HZ,
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ATA_TMOUT_INTERNAL = 30 * HZ,
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ATA_TMOUT_INTERNAL_QUICK = 5 * HZ,
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/* ATA bus states */
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BUS_UNKNOWN = 0,
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BUS_DMA = 1,
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BUS_IDLE = 2,
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BUS_NOINTR = 3,
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BUS_NODATA = 4,
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BUS_TIMER = 5,
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BUS_PIO = 6,
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BUS_EDD = 7,
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BUS_IDENTIFY = 8,
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BUS_PACKET = 9,
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/* SATA port states */
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PORT_UNKNOWN = 0,
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PORT_ENABLED = 1,
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PORT_DISABLED = 2,
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/* encoding various smaller bitmaps into a single
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* unsigned long bitmap
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*/
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ATA_SHIFT_UDMA = 0,
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ATA_SHIFT_MWDMA = 8,
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ATA_SHIFT_PIO = 11,
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/* size of buffer to pad xfers ending on unaligned boundaries */
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ATA_DMA_PAD_SZ = 4,
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ATA_DMA_PAD_BUF_SZ = ATA_DMA_PAD_SZ * ATA_MAX_QUEUE,
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/* Masks for port functions */
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ATA_PORT_PRIMARY = (1 << 0),
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ATA_PORT_SECONDARY = (1 << 1),
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};
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enum hsm_task_states {
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HSM_ST_UNKNOWN,
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HSM_ST_IDLE,
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HSM_ST_POLL,
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HSM_ST_TMOUT,
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HSM_ST,
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HSM_ST_LAST,
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HSM_ST_LAST_POLL,
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HSM_ST_ERR,
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};
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enum ata_completion_errors {
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AC_ERR_OTHER = (1 << 0),
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AC_ERR_DEV = (1 << 1),
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AC_ERR_ATA_BUS = (1 << 2),
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AC_ERR_HOST_BUS = (1 << 3),
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};
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/* forward declarations */
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struct scsi_device;
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struct ata_port_operations;
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struct ata_port;
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struct ata_queued_cmd;
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/* typedefs */
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typedef int (*ata_qc_cb_t) (struct ata_queued_cmd *qc);
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struct ata_ioports {
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unsigned long cmd_addr;
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unsigned long data_addr;
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unsigned long error_addr;
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unsigned long feature_addr;
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unsigned long nsect_addr;
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unsigned long lbal_addr;
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unsigned long lbam_addr;
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unsigned long lbah_addr;
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unsigned long device_addr;
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unsigned long status_addr;
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unsigned long command_addr;
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unsigned long altstatus_addr;
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unsigned long ctl_addr;
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unsigned long bmdma_addr;
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unsigned long scr_addr;
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};
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struct ata_probe_ent {
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struct list_head node;
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struct device *dev;
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const struct ata_port_operations *port_ops;
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struct scsi_host_template *sht;
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struct ata_ioports port[ATA_MAX_PORTS];
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unsigned int n_ports;
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unsigned int hard_port_no;
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unsigned int pio_mask;
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unsigned int mwdma_mask;
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unsigned int udma_mask;
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unsigned int legacy_mode;
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unsigned long irq;
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unsigned int irq_flags;
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unsigned long host_flags;
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void __iomem *mmio_base;
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void *private_data;
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};
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struct ata_host_set {
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spinlock_t lock;
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struct device *dev;
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unsigned long irq;
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void __iomem *mmio_base;
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unsigned int n_ports;
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void *private_data;
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const struct ata_port_operations *ops;
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struct ata_port * ports[0];
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};
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struct ata_queued_cmd {
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struct ata_port *ap;
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struct ata_device *dev;
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struct scsi_cmnd *scsicmd;
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void (*scsidone)(struct scsi_cmnd *);
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struct ata_taskfile tf;
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u8 cdb[ATAPI_CDB_LEN];
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unsigned long flags; /* ATA_QCFLAG_xxx */
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unsigned int tag;
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unsigned int n_elem;
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unsigned int orig_n_elem;
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int dma_dir;
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unsigned int pad_len;
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unsigned int nsect;
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unsigned int cursect;
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unsigned int nbytes;
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unsigned int curbytes;
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unsigned int cursg;
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unsigned int cursg_ofs;
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struct scatterlist sgent;
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struct scatterlist pad_sgent;
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void *buf_virt;
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/* DO NOT iterate over __sg manually, use ata_for_each_sg() */
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struct scatterlist *__sg;
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unsigned int err_mask;
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ata_qc_cb_t complete_fn;
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void *private_data;
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};
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struct ata_host_stats {
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unsigned long unhandled_irq;
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unsigned long idle_irq;
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unsigned long rw_reqbuf;
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};
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struct ata_device {
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u64 n_sectors; /* size of device, if ATA */
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unsigned long flags; /* ATA_DFLAG_xxx */
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unsigned int class; /* ATA_DEV_xxx */
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unsigned int devno; /* 0 or 1 */
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u16 id[ATA_ID_WORDS]; /* IDENTIFY xxx DEVICE data */
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u8 pio_mode;
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u8 dma_mode;
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u8 xfer_mode;
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unsigned int xfer_shift; /* ATA_SHIFT_xxx */
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unsigned int multi_count; /* sectors count for
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READ/WRITE MULTIPLE */
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/* for CHS addressing */
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u16 cylinders; /* Number of cylinders */
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u16 heads; /* Number of heads */
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u16 sectors; /* Number of sectors per track */
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};
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struct ata_port {
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struct Scsi_Host *host; /* our co-allocated scsi host */
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const struct ata_port_operations *ops;
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unsigned long flags; /* ATA_FLAG_xxx */
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unsigned int id; /* unique id req'd by scsi midlyr */
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unsigned int port_no; /* unique port #; from zero */
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unsigned int hard_port_no; /* hardware port #; from zero */
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struct ata_prd *prd; /* our SG list */
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dma_addr_t prd_dma; /* and its DMA mapping */
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void *pad; /* array of DMA pad buffers */
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dma_addr_t pad_dma;
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struct ata_ioports ioaddr; /* ATA cmd/ctl/dma register blocks */
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u8 ctl; /* cache of ATA control register */
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u8 last_ctl; /* Cache last written value */
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unsigned int pio_mask;
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unsigned int mwdma_mask;
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unsigned int udma_mask;
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unsigned int cbl; /* cable type; ATA_CBL_xxx */
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unsigned int cdb_len;
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struct ata_device device[ATA_MAX_DEVICES];
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struct ata_queued_cmd qcmd[ATA_MAX_QUEUE];
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unsigned long qactive;
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unsigned int active_tag;
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struct ata_host_stats stats;
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struct ata_host_set *host_set;
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struct work_struct packet_task;
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struct work_struct pio_task;
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unsigned int hsm_task_state;
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unsigned long pio_task_timeout;
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void *private_data;
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};
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struct ata_port_operations {
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void (*port_disable) (struct ata_port *);
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void (*dev_config) (struct ata_port *, struct ata_device *);
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void (*set_piomode) (struct ata_port *, struct ata_device *);
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void (*set_dmamode) (struct ata_port *, struct ata_device *);
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void (*tf_load) (struct ata_port *ap, const struct ata_taskfile *tf);
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void (*tf_read) (struct ata_port *ap, struct ata_taskfile *tf);
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void (*exec_command)(struct ata_port *ap, const struct ata_taskfile *tf);
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u8 (*check_status)(struct ata_port *ap);
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u8 (*check_altstatus)(struct ata_port *ap);
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void (*dev_select)(struct ata_port *ap, unsigned int device);
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void (*phy_reset) (struct ata_port *ap);
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void (*post_set_mode) (struct ata_port *ap);
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int (*check_atapi_dma) (struct ata_queued_cmd *qc);
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void (*bmdma_setup) (struct ata_queued_cmd *qc);
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void (*bmdma_start) (struct ata_queued_cmd *qc);
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void (*qc_prep) (struct ata_queued_cmd *qc);
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int (*qc_issue) (struct ata_queued_cmd *qc);
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void (*eng_timeout) (struct ata_port *ap);
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irqreturn_t (*irq_handler)(int, void *, struct pt_regs *);
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void (*irq_clear) (struct ata_port *);
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u32 (*scr_read) (struct ata_port *ap, unsigned int sc_reg);
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void (*scr_write) (struct ata_port *ap, unsigned int sc_reg,
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u32 val);
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int (*port_start) (struct ata_port *ap);
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void (*port_stop) (struct ata_port *ap);
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void (*host_stop) (struct ata_host_set *host_set);
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void (*bmdma_stop) (struct ata_queued_cmd *qc);
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u8 (*bmdma_status) (struct ata_port *ap);
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};
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struct ata_port_info {
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struct scsi_host_template *sht;
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unsigned long host_flags;
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unsigned long pio_mask;
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unsigned long mwdma_mask;
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unsigned long udma_mask;
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const struct ata_port_operations *port_ops;
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void *private_data;
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};
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struct ata_timing {
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unsigned short mode; /* ATA mode */
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unsigned short setup; /* t1 */
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unsigned short act8b; /* t2 for 8-bit I/O */
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unsigned short rec8b; /* t2i for 8-bit I/O */
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unsigned short cyc8b; /* t0 for 8-bit I/O */
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unsigned short active; /* t2 or tD */
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unsigned short recover; /* t2i or tK */
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unsigned short cycle; /* t0 */
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unsigned short udma; /* t2CYCTYP/2 */
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};
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#define FIT(v,vmin,vmax) max_t(short,min_t(short,v,vmax),vmin)
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extern void ata_port_probe(struct ata_port *);
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extern void __sata_phy_reset(struct ata_port *ap);
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extern void sata_phy_reset(struct ata_port *ap);
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extern void ata_bus_reset(struct ata_port *ap);
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extern void ata_port_disable(struct ata_port *);
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extern void ata_std_ports(struct ata_ioports *ioaddr);
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#ifdef CONFIG_PCI
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extern int ata_pci_init_one (struct pci_dev *pdev, struct ata_port_info **port_info,
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unsigned int n_ports);
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extern void ata_pci_remove_one (struct pci_dev *pdev);
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extern int ata_pci_device_suspend(struct pci_dev *pdev, pm_message_t state);
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extern int ata_pci_device_resume(struct pci_dev *pdev);
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#endif /* CONFIG_PCI */
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extern int ata_device_add(const struct ata_probe_ent *ent);
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extern void ata_host_set_remove(struct ata_host_set *host_set);
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extern int ata_scsi_detect(struct scsi_host_template *sht);
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extern int ata_scsi_ioctl(struct scsi_device *dev, int cmd, void __user *arg);
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extern int ata_scsi_queuecmd(struct scsi_cmnd *cmd, void (*done)(struct scsi_cmnd *));
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extern int ata_scsi_error(struct Scsi_Host *host);
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extern int ata_scsi_release(struct Scsi_Host *host);
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extern unsigned int ata_host_intr(struct ata_port *ap, struct ata_queued_cmd *qc);
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extern int ata_scsi_device_resume(struct scsi_device *);
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extern int ata_scsi_device_suspend(struct scsi_device *);
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extern int ata_device_resume(struct ata_port *, struct ata_device *);
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extern int ata_device_suspend(struct ata_port *, struct ata_device *);
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extern int ata_ratelimit(void);
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/*
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* Default driver ops implementations
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*/
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extern void ata_tf_load(struct ata_port *ap, const struct ata_taskfile *tf);
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extern void ata_tf_read(struct ata_port *ap, struct ata_taskfile *tf);
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extern void ata_tf_to_fis(const struct ata_taskfile *tf, u8 *fis, u8 pmp);
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extern void ata_tf_from_fis(const u8 *fis, struct ata_taskfile *tf);
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extern void ata_noop_dev_select (struct ata_port *ap, unsigned int device);
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extern void ata_std_dev_select (struct ata_port *ap, unsigned int device);
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extern u8 ata_check_status(struct ata_port *ap);
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extern u8 ata_altstatus(struct ata_port *ap);
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extern void ata_exec_command(struct ata_port *ap, const struct ata_taskfile *tf);
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extern int ata_port_start (struct ata_port *ap);
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extern void ata_port_stop (struct ata_port *ap);
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extern void ata_host_stop (struct ata_host_set *host_set);
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extern irqreturn_t ata_interrupt (int irq, void *dev_instance, struct pt_regs *regs);
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extern void ata_qc_prep(struct ata_queued_cmd *qc);
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extern int ata_qc_issue_prot(struct ata_queued_cmd *qc);
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extern void ata_sg_init_one(struct ata_queued_cmd *qc, void *buf,
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unsigned int buflen);
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extern void ata_sg_init(struct ata_queued_cmd *qc, struct scatterlist *sg,
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unsigned int n_elem);
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extern unsigned int ata_dev_classify(const struct ata_taskfile *tf);
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extern void ata_dev_id_string(const u16 *id, unsigned char *s,
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unsigned int ofs, unsigned int len);
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extern void ata_dev_config(struct ata_port *ap, unsigned int i);
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extern void ata_bmdma_setup (struct ata_queued_cmd *qc);
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extern void ata_bmdma_start (struct ata_queued_cmd *qc);
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extern void ata_bmdma_stop(struct ata_queued_cmd *qc);
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extern u8 ata_bmdma_status(struct ata_port *ap);
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extern void ata_bmdma_irq_clear(struct ata_port *ap);
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extern void ata_qc_complete(struct ata_queued_cmd *qc);
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extern void ata_eng_timeout(struct ata_port *ap);
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extern void ata_scsi_simulate(struct ata_port *ap, struct ata_device *dev,
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struct scsi_cmnd *cmd,
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void (*done)(struct scsi_cmnd *));
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extern int ata_std_bios_param(struct scsi_device *sdev,
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struct block_device *bdev,
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sector_t capacity, int geom[]);
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extern int ata_scsi_slave_config(struct scsi_device *sdev);
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/*
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* Timing helpers
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*/
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extern unsigned int ata_pio_need_iordy(const struct ata_device *);
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extern int ata_timing_compute(struct ata_device *, unsigned short,
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struct ata_timing *, int, int);
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extern void ata_timing_merge(const struct ata_timing *,
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const struct ata_timing *, struct ata_timing *,
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unsigned int);
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enum {
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ATA_TIMING_SETUP = (1 << 0),
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ATA_TIMING_ACT8B = (1 << 1),
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ATA_TIMING_REC8B = (1 << 2),
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ATA_TIMING_CYC8B = (1 << 3),
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ATA_TIMING_8BIT = ATA_TIMING_ACT8B | ATA_TIMING_REC8B |
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ATA_TIMING_CYC8B,
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ATA_TIMING_ACTIVE = (1 << 4),
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ATA_TIMING_RECOVER = (1 << 5),
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ATA_TIMING_CYCLE = (1 << 6),
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ATA_TIMING_UDMA = (1 << 7),
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ATA_TIMING_ALL = ATA_TIMING_SETUP | ATA_TIMING_ACT8B |
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ATA_TIMING_REC8B | ATA_TIMING_CYC8B |
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ATA_TIMING_ACTIVE | ATA_TIMING_RECOVER |
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ATA_TIMING_CYCLE | ATA_TIMING_UDMA,
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};
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#ifdef CONFIG_PCI
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struct pci_bits {
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unsigned int reg; /* PCI config register to read */
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unsigned int width; /* 1 (8 bit), 2 (16 bit), 4 (32 bit) */
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unsigned long mask;
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unsigned long val;
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};
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extern void ata_pci_host_stop (struct ata_host_set *host_set);
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extern struct ata_probe_ent *
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ata_pci_init_native_mode(struct pci_dev *pdev, struct ata_port_info **port, int portmask);
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extern int pci_test_config_bits(struct pci_dev *pdev, const struct pci_bits *bits);
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#endif /* CONFIG_PCI */
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static inline int
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ata_sg_is_last(struct scatterlist *sg, struct ata_queued_cmd *qc)
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{
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if (sg == &qc->pad_sgent)
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return 1;
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if (qc->pad_len)
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return 0;
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if (((sg - qc->__sg) + 1) == qc->n_elem)
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return 1;
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return 0;
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}
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static inline struct scatterlist *
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ata_qc_next_sg(struct scatterlist *sg, struct ata_queued_cmd *qc)
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{
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if (sg == &qc->pad_sgent)
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return NULL;
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if (++sg - qc->__sg < qc->n_elem)
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return sg;
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return qc->pad_len ? &qc->pad_sgent : NULL;
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}
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#define ata_for_each_sg(sg, qc) \
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for (sg = qc->__sg; sg; sg = ata_qc_next_sg(sg, qc))
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static inline unsigned int ata_tag_valid(unsigned int tag)
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{
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return (tag < ATA_MAX_QUEUE) ? 1 : 0;
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}
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static inline unsigned int ata_dev_present(const struct ata_device *dev)
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{
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return ((dev->class == ATA_DEV_ATA) ||
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(dev->class == ATA_DEV_ATAPI));
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}
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static inline u8 ata_chk_status(struct ata_port *ap)
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{
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return ap->ops->check_status(ap);
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}
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/**
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* ata_pause - Flush writes and pause 400 nanoseconds.
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* @ap: Port to wait for.
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*
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* LOCKING:
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* Inherited from caller.
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*/
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static inline void ata_pause(struct ata_port *ap)
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{
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ata_altstatus(ap);
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ndelay(400);
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}
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/**
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* ata_busy_wait - Wait for a port status register
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* @ap: Port to wait for.
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*
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* Waits up to max*10 microseconds for the selected bits in the port's
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* status register to be cleared.
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* Returns final value of status register.
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*
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* LOCKING:
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* Inherited from caller.
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*/
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static inline u8 ata_busy_wait(struct ata_port *ap, unsigned int bits,
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unsigned int max)
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{
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u8 status;
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do {
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udelay(10);
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status = ata_chk_status(ap);
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max--;
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} while ((status & bits) && (max > 0));
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return status;
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}
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/**
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* ata_wait_idle - Wait for a port to be idle.
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* @ap: Port to wait for.
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*
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* Waits up to 10ms for port's BUSY and DRQ signals to clear.
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* Returns final value of status register.
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*
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* LOCKING:
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* Inherited from caller.
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*/
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static inline u8 ata_wait_idle(struct ata_port *ap)
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{
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u8 status = ata_busy_wait(ap, ATA_BUSY | ATA_DRQ, 1000);
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if (status & (ATA_BUSY | ATA_DRQ)) {
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unsigned long l = ap->ioaddr.status_addr;
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printk(KERN_WARNING
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"ATA: abnormal status 0x%X on port 0x%lX\n",
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status, l);
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}
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return status;
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}
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static inline void ata_qc_set_polling(struct ata_queued_cmd *qc)
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{
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qc->tf.ctl |= ATA_NIEN;
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}
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static inline struct ata_queued_cmd *ata_qc_from_tag (struct ata_port *ap,
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unsigned int tag)
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{
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if (likely(ata_tag_valid(tag)))
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return &ap->qcmd[tag];
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return NULL;
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}
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static inline void ata_tf_init(struct ata_port *ap, struct ata_taskfile *tf, unsigned int device)
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{
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memset(tf, 0, sizeof(*tf));
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tf->ctl = ap->ctl;
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if (device == 0)
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tf->device = ATA_DEVICE_OBS;
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else
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tf->device = ATA_DEVICE_OBS | ATA_DEV1;
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}
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static inline void ata_qc_reinit(struct ata_queued_cmd *qc)
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{
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qc->__sg = NULL;
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qc->flags = 0;
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qc->cursect = qc->cursg = qc->cursg_ofs = 0;
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qc->nsect = 0;
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qc->nbytes = qc->curbytes = 0;
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qc->err_mask = 0;
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ata_tf_init(qc->ap, &qc->tf, qc->dev->devno);
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}
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/**
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* ata_irq_on - Enable interrupts on a port.
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* @ap: Port on which interrupts are enabled.
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*
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* Enable interrupts on a legacy IDE device using MMIO or PIO,
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* wait for idle, clear any pending interrupts.
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*
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* LOCKING:
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* Inherited from caller.
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*/
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static inline u8 ata_irq_on(struct ata_port *ap)
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{
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struct ata_ioports *ioaddr = &ap->ioaddr;
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u8 tmp;
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ap->ctl &= ~ATA_NIEN;
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ap->last_ctl = ap->ctl;
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if (ap->flags & ATA_FLAG_MMIO)
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writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
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else
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outb(ap->ctl, ioaddr->ctl_addr);
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tmp = ata_wait_idle(ap);
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ap->ops->irq_clear(ap);
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return tmp;
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}
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/**
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* ata_irq_ack - Acknowledge a device interrupt.
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* @ap: Port on which interrupts are enabled.
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*
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* Wait up to 10 ms for legacy IDE device to become idle (BUSY
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* or BUSY+DRQ clear). Obtain dma status and port status from
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* device. Clear the interrupt. Return port status.
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*
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* LOCKING:
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*/
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static inline u8 ata_irq_ack(struct ata_port *ap, unsigned int chk_drq)
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{
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unsigned int bits = chk_drq ? ATA_BUSY | ATA_DRQ : ATA_BUSY;
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u8 host_stat, post_stat, status;
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status = ata_busy_wait(ap, bits, 1000);
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if (status & bits)
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DPRINTK("abnormal status 0x%X\n", status);
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/* get controller status; clear intr, err bits */
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if (ap->flags & ATA_FLAG_MMIO) {
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void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr;
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host_stat = readb(mmio + ATA_DMA_STATUS);
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writeb(host_stat | ATA_DMA_INTR | ATA_DMA_ERR,
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mmio + ATA_DMA_STATUS);
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post_stat = readb(mmio + ATA_DMA_STATUS);
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} else {
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host_stat = inb(ap->ioaddr.bmdma_addr + ATA_DMA_STATUS);
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outb(host_stat | ATA_DMA_INTR | ATA_DMA_ERR,
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ap->ioaddr.bmdma_addr + ATA_DMA_STATUS);
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post_stat = inb(ap->ioaddr.bmdma_addr + ATA_DMA_STATUS);
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}
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VPRINTK("irq ack: host_stat 0x%X, new host_stat 0x%X, drv_stat 0x%X\n",
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host_stat, post_stat, status);
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return status;
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}
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static inline u32 scr_read(struct ata_port *ap, unsigned int reg)
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{
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return ap->ops->scr_read(ap, reg);
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}
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static inline void scr_write(struct ata_port *ap, unsigned int reg, u32 val)
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{
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ap->ops->scr_write(ap, reg, val);
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}
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static inline void scr_write_flush(struct ata_port *ap, unsigned int reg,
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u32 val)
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{
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ap->ops->scr_write(ap, reg, val);
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(void) ap->ops->scr_read(ap, reg);
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}
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static inline unsigned int sata_dev_present(struct ata_port *ap)
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{
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return ((scr_read(ap, SCR_STATUS) & 0xf) == 0x3) ? 1 : 0;
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}
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static inline int ata_try_flush_cache(const struct ata_device *dev)
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{
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return ata_id_wcache_enabled(dev->id) ||
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ata_id_has_flush(dev->id) ||
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ata_id_has_flush_ext(dev->id);
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}
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static inline unsigned int ac_err_mask(u8 status)
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{
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if (status & ATA_BUSY)
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return AC_ERR_ATA_BUS;
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if (status & (ATA_ERR | ATA_DF))
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return AC_ERR_DEV;
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return 0;
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}
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static inline unsigned int __ac_err_mask(u8 status)
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{
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unsigned int mask = ac_err_mask(status);
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if (mask == 0)
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return AC_ERR_OTHER;
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return mask;
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}
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|
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static inline int ata_pad_alloc(struct ata_port *ap, struct device *dev)
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{
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ap->pad_dma = 0;
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ap->pad = dma_alloc_coherent(dev, ATA_DMA_PAD_BUF_SZ,
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&ap->pad_dma, GFP_KERNEL);
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return (ap->pad == NULL) ? -ENOMEM : 0;
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}
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static inline void ata_pad_free(struct ata_port *ap, struct device *dev)
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{
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dma_free_coherent(dev, ATA_DMA_PAD_BUF_SZ, ap->pad, ap->pad_dma);
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}
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#endif /* __LINUX_LIBATA_H__ */
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