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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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c314c9f15a
On some SoC there are no simple mapping of pins to bias register bits and a lookup table is needed. This logic is already implemented in some SoC specific drivers that could benefit from a generic implementation. Add helpers to deal with the lookup which later can be used by the SoC specific drivers. The logic used to lookup are different from the one it aims to replace, this is intentional. This new method reduces the memory consumption at the cost of increased CPU usage and fix a bug where a WARN() would incorrectly be triggered if the register offset is 0. Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
41 lines
1.1 KiB
C
41 lines
1.1 KiB
C
/*
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* SuperH Pin Function Controller support.
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*
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* Copyright (C) 2012 Renesas Solutions Corp.
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*/
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#ifndef __SH_PFC_CORE_H__
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#define __SH_PFC_CORE_H__
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#include <linux/types.h>
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#include "sh_pfc.h"
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struct sh_pfc_pin_range {
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u16 start;
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u16 end;
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};
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int sh_pfc_register_gpiochip(struct sh_pfc *pfc);
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int sh_pfc_register_pinctrl(struct sh_pfc *pfc);
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u32 sh_pfc_read_raw_reg(void __iomem *mapped_reg, unsigned int reg_width);
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void sh_pfc_write_raw_reg(void __iomem *mapped_reg, unsigned int reg_width,
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u32 data);
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u32 sh_pfc_read_reg(struct sh_pfc *pfc, u32 reg, unsigned int width);
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void sh_pfc_write_reg(struct sh_pfc *pfc, u32 reg, unsigned int width,
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u32 data);
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int sh_pfc_get_pin_index(struct sh_pfc *pfc, unsigned int pin);
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int sh_pfc_config_mux(struct sh_pfc *pfc, unsigned mark, int pinmux_type);
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const struct sh_pfc_bias_info *
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sh_pfc_pin_to_bias_info(const struct sh_pfc_bias_info *info,
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unsigned int num, unsigned int pin);
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#endif /* __SH_PFC_CORE_H__ */
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