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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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944c3d81db
Convert the ColdFire 54xx CPU General Timer register address definitions to include the MCF_MBAR peripheral region offset. This makes them consistent with all other 54xx address register definitions (in m54xxsim.h). The goal is to reduce different definitions used (some including offsets and others not) causing bugs when used incorrectly. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
104 lines
2.8 KiB
C
104 lines
2.8 KiB
C
/***************************************************************************/
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/*
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* linux/arch/m68knommu/platform/54xx/config.c
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*
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* Copyright (C) 2010, Philippe De Muyter <phdm@macqel.be>
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*/
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/***************************************************************************/
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#include <linux/kernel.h>
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#include <linux/param.h>
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#include <linux/init.h>
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#include <linux/interrupt.h>
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#include <linux/io.h>
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#include <linux/mm.h>
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#include <linux/bootmem.h>
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#include <asm/pgalloc.h>
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#include <asm/machdep.h>
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#include <asm/coldfire.h>
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#include <asm/m54xxsim.h>
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#include <asm/mcfuart.h>
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#include <asm/m54xxgpt.h>
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#ifdef CONFIG_MMU
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#include <asm/mmu_context.h>
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#endif
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/***************************************************************************/
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static void __init m54xx_uarts_init(void)
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{
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/* enable io pins */
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__raw_writeb(MCF_PAR_PSC_TXD | MCF_PAR_PSC_RXD, MCFGPIO_PAR_PSC0);
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__raw_writeb(MCF_PAR_PSC_TXD | MCF_PAR_PSC_RXD | MCF_PAR_PSC_RTS_RTS,
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MCFGPIO_PAR_PSC1);
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__raw_writeb(MCF_PAR_PSC_TXD | MCF_PAR_PSC_RXD | MCF_PAR_PSC_RTS_RTS |
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MCF_PAR_PSC_CTS_CTS, MCFGPIO_PAR_PSC2);
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__raw_writeb(MCF_PAR_PSC_TXD | MCF_PAR_PSC_RXD, MCFGPIO_PAR_PSC3);
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}
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/***************************************************************************/
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static void mcf54xx_reset(void)
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{
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/* disable interrupts and enable the watchdog */
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asm("movew #0x2700, %sr\n");
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__raw_writel(0, MCF_GPT_GMS0);
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__raw_writel(MCF_GPT_GCIR_CNT(1), MCF_GPT_GCIR0);
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__raw_writel(MCF_GPT_GMS_WDEN | MCF_GPT_GMS_CE | MCF_GPT_GMS_TMS(4),
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MCF_GPT_GMS0);
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}
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/***************************************************************************/
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#ifdef CONFIG_MMU
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unsigned long num_pages;
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static void __init mcf54xx_bootmem_alloc(void)
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{
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unsigned long start_pfn;
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unsigned long memstart;
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/* _rambase and _ramend will be naturally page aligned */
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m68k_memory[0].addr = _rambase;
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m68k_memory[0].size = _ramend - _rambase;
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/* compute total pages in system */
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num_pages = (_ramend - _rambase) >> PAGE_SHIFT;
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/* page numbers */
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memstart = PAGE_ALIGN(_ramstart);
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min_low_pfn = _rambase >> PAGE_SHIFT;
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start_pfn = memstart >> PAGE_SHIFT;
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max_low_pfn = _ramend >> PAGE_SHIFT;
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high_memory = (void *)_ramend;
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m68k_virt_to_node_shift = fls(_ramend - _rambase - 1) - 6;
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module_fixup(NULL, __start_fixup, __stop_fixup);
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/* setup bootmem data */
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m68k_setup_node(0);
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memstart += init_bootmem_node(NODE_DATA(0), start_pfn,
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min_low_pfn, max_low_pfn);
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free_bootmem_node(NODE_DATA(0), memstart, _ramend - memstart);
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}
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#endif /* CONFIG_MMU */
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/***************************************************************************/
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void __init config_BSP(char *commandp, int size)
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{
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#ifdef CONFIG_MMU
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mcf54xx_bootmem_alloc();
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mmu_context_init();
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#endif
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mach_reset = mcf54xx_reset;
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mach_sched_init = hw_timer_init;
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m54xx_uarts_init();
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}
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/***************************************************************************/
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