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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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9d9f78ed9a
Many platforms support simple gateable clocks, fixed-rate clocks, adjustable divider clocks and multi-parent multiplexer clocks. This patch introduces basic clock types for the above-mentioned hardware which share some common characteristics. Based on original work by Jeremy Kerr and contribution by Jamie Iles. Dividers and multiplexor clocks originally contributed by Richard Zhao & Sascha Hauer. Signed-off-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Mike Turquette <mturquette@ti.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Tested-by: Andrew Lunn <andrew@lunn.ch> Reviewed-by: Rob Herring <rob.herring@calxeda.com> Cc: Russell King <linux@arm.linux.org.uk> Cc: Jeremy Kerr <jeremy.kerr@canonical.com> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Arnd Bergman <arnd.bergmann@linaro.org> Cc: Paul Walmsley <paul@pwsan.com> Cc: Shawn Guo <shawn.guo@freescale.com> Cc: Sascha Hauer <s.hauer@pengutronix.de> Cc: Jamie Iles <jamie@jamieiles.com> Cc: Richard Zhao <richard.zhao@linaro.org> Cc: Saravana Kannan <skannan@codeaurora.org> Cc: Magnus Damm <magnus.damm@gmail.com> Cc: Mark Brown <broonie@opensource.wolfsonmicro.com> Cc: Linus Walleij <linus.walleij@stericsson.com> Cc: Stephen Boyd <sboyd@codeaurora.org> Cc: Amit Kucheria <amit.kucheria@linaro.org> Cc: Deepak Saxena <dsaxena@linaro.org> Cc: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
83 lines
2.1 KiB
C
83 lines
2.1 KiB
C
/*
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* Copyright (C) 2010-2011 Canonical Ltd <jeremy.kerr@canonical.com>
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* Copyright (C) 2011-2012 Mike Turquette, Linaro Ltd <mturquette@linaro.org>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* Fixed rate clock implementation
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*/
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#include <linux/clk-provider.h>
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#include <linux/module.h>
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#include <linux/slab.h>
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#include <linux/io.h>
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#include <linux/err.h>
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/*
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* DOC: basic fixed-rate clock that cannot gate
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*
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* Traits of this clock:
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* prepare - clk_(un)prepare only ensures parents are prepared
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* enable - clk_enable only ensures parents are enabled
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* rate - rate is always a fixed value. No clk_set_rate support
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* parent - fixed parent. No clk_set_parent support
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*/
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#define to_clk_fixed_rate(_hw) container_of(_hw, struct clk_fixed_rate, hw)
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static unsigned long clk_fixed_rate_recalc_rate(struct clk_hw *hw,
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unsigned long parent_rate)
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{
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return to_clk_fixed_rate(hw)->fixed_rate;
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}
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EXPORT_SYMBOL_GPL(clk_fixed_rate_recalc_rate);
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struct clk_ops clk_fixed_rate_ops = {
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.recalc_rate = clk_fixed_rate_recalc_rate,
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};
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EXPORT_SYMBOL_GPL(clk_fixed_rate_ops);
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struct clk *clk_register_fixed_rate(struct device *dev, const char *name,
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const char *parent_name, unsigned long flags,
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unsigned long fixed_rate)
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{
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struct clk_fixed_rate *fixed;
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char **parent_names = NULL;
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u8 len;
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fixed = kzalloc(sizeof(struct clk_fixed_rate), GFP_KERNEL);
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if (!fixed) {
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pr_err("%s: could not allocate fixed clk\n", __func__);
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return ERR_PTR(-ENOMEM);
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}
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/* struct clk_fixed_rate assignments */
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fixed->fixed_rate = fixed_rate;
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if (parent_name) {
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parent_names = kmalloc(sizeof(char *), GFP_KERNEL);
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if (! parent_names)
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goto out;
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len = sizeof(char) * strlen(parent_name);
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parent_names[0] = kmalloc(len, GFP_KERNEL);
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if (!parent_names[0])
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goto out;
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strncpy(parent_names[0], parent_name, len);
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}
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out:
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return clk_register(dev, name,
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&clk_fixed_rate_ops, &fixed->hw,
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parent_names,
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(parent_name ? 1 : 0),
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flags);
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}
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