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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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b8edf848e9
Here are more patches in the progression towards multiplatform, sparse irq conversions in particular. Tegra has a handful of cleanups and general groundwork, but is not quite there yet on full enablement. Platforms that are enabled through this branch are VT8500 and Zynq. note that i.MX was converted in one of the earlier cleanup branches as well (before we started a separate topic for multiplatform). And both new platforms for this merge window, sunxi and bcm, were merged with multiplatform support enabled. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.11 (GNU/Linux) iQIcBAABAgAGBQJQySb/AAoJEIwa5zzehBx3Wo4P/0GrpUhB/qwuhgy43MA2I1Dv tnyuFvsfW9uRExcw2IwT39GFls98QUM9TwQxPqOTHVf+u0LkYMZ9aDeWJOdj3RvG H70Ypj4gZDrzZAFr2TUf8NnYGHd6G2EcMn3261Hjfd7YrswCjsMPvgRns7VOyHCa deif3KcLu3+HzxvuzqlVlTuSAagCQbfqqnTQduMRdJPHT3X3sXwl7ABW+qfOoeYC rjqIbjdh5dB1d/f7igtgBbXjSTnVz/Mr1+wk4rp9Xr1Wv0IXvIaSKjK2Df8ZuNAk aQ6mMy/oDVxlDSrYv0F7lB40/rsZcPqz8+fgYJ2FnvCpIM7z7NeTWD2kQJ2UaQ/s VunShloRxF8It6104EVWZDfEA9NvVBcCALSze0NukqiHZRZYGUzxRNQDrncaksC9 Lm+Z16cUWogsZq7VDCgXYQJeakPQfBDnsx7siMvAbOgvtpSClxuwhdC/czJiix7h BcpA+l5xSviUhHvzHhDt9iJxHjbUmo1xLDvaZSgj2OjAj257JcwaNBCk5BjZTCwe xZmQu1FjwaGtjLiG6QY0WJRsq1hiFRIb/MaWar/WpfqADFqARoambGFUjOl+P4Mu DIM5Z0AS04H+pLuP1QOz/yXxOPEP6Ri36to6XrgzfL/XGet5LW2P59xXxhcWC/OL /3IAcQrsAqh4aGMOstW1 =UJlh -----END PGP SIGNATURE----- Merge tag 'multiplatform' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC multiplatform conversion patches from Olof Johansson: "Here are more patches in the progression towards multiplatform, sparse irq conversions in particular. Tegra has a handful of cleanups and general groundwork, but is not quite there yet on full enablement. Platforms that are enabled through this branch are VT8500 and Zynq. Note that i.MX was converted in one of the earlier cleanup branches as well (before we started a separate topic for multiplatform). And both new platforms for this merge window, sunxi and bcm, were merged with multiplatform support enabled." Fix up conflicts mostly as per Olof. * tag 'multiplatform' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (29 commits) ARM: zynq: Remove all unused mach headers ARM: zynq: add support for ARCH_MULTIPLATFORM ARM: zynq: make use of debug_ll_io_init() ARM: zynq: remove TTC early mapping ARM: tegra: move debug-macro.S to include/debug ARM: tegra: don't include iomap.h from debug-macro.S ARM: tegra: decouple uncompress.h and debug-macro.S ARM: tegra: simplify DEBUG_LL UART selection options ARM: tegra: select SPARSE_IRQ ARM: tegra: enhance timer.c to get IO address from device tree ARM: tegra: enhance timer.c to get IRQ info from device tree ARM: timer: fix checkpatch warnings ARM: tegra: add TWD to device tree ARM: tegra: define DT bindings for and instantiate RTC ARM: tegra: define DT bindings for and instantiate timer clocksource/mtu-nomadik: use apb_pclk clk: ux500: Register mtu apb_pclocks ARM: plat-nomadik: convert platforms to SPARSE_IRQ mfd/db8500-prcmu: use the irq_domain_add_simple() mfd/ab8500-core: use irq_domain_add_simple() ...
792 lines
20 KiB
C
792 lines
20 KiB
C
/*
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* Copyright (C) 2008-2012 ST-Ericsson
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*
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* Author: Srinidhi KASAGAR <srinidhi.kasagar@stericsson.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2, as
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* published by the Free Software Foundation.
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*
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*/
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/interrupt.h>
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#include <linux/platform_device.h>
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#include <linux/io.h>
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#include <linux/i2c.h>
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#include <linux/platform_data/i2c-nomadik.h>
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#include <linux/platform_data/db8500_thermal.h>
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#include <linux/gpio.h>
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#include <linux/amba/bus.h>
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#include <linux/amba/pl022.h>
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#include <linux/amba/serial.h>
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#include <linux/spi/spi.h>
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#include <linux/mfd/abx500/ab8500.h>
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#include <linux/regulator/ab8500.h>
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#include <linux/regulator/fixed.h>
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#include <linux/mfd/tc3589x.h>
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#include <linux/mfd/tps6105x.h>
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#include <linux/mfd/abx500/ab8500-gpio.h>
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#include <linux/mfd/abx500/ab8500-codec.h>
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#include <linux/leds-lp5521.h>
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#include <linux/input.h>
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#include <linux/smsc911x.h>
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#include <linux/gpio_keys.h>
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#include <linux/delay.h>
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#include <linux/leds.h>
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#include <linux/pinctrl/consumer.h>
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#include <linux/platform_data/pinctrl-nomadik.h>
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#include <linux/platform_data/dma-ste-dma40.h>
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#include <asm/mach-types.h>
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#include <asm/mach/arch.h>
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#include <asm/hardware/gic.h>
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#include <mach/hardware.h>
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#include <mach/setup.h>
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#include <mach/devices.h>
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#include <mach/irqs.h>
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#include <linux/platform_data/crypto-ux500.h>
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#include "ste-dma40-db8500.h"
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#include "devices-db8500.h"
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#include "board-mop500.h"
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#include "board-mop500-regulators.h"
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static struct gpio_led snowball_led_array[] = {
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{
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.name = "user_led",
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.default_trigger = "heartbeat",
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.gpio = 142,
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},
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};
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static struct gpio_led_platform_data snowball_led_data = {
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.leds = snowball_led_array,
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.num_leds = ARRAY_SIZE(snowball_led_array),
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};
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static struct platform_device snowball_led_dev = {
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.name = "leds-gpio",
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.dev = {
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.platform_data = &snowball_led_data,
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},
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};
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static struct fixed_voltage_config snowball_gpio_en_3v3_data = {
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.supply_name = "EN-3V3",
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.gpio = SNOWBALL_EN_3V3_ETH_GPIO,
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.microvolts = 3300000,
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.enable_high = 1,
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.init_data = &gpio_en_3v3_regulator,
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.startup_delay = 5000, /* 1200us */
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};
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static struct platform_device snowball_gpio_en_3v3_regulator_dev = {
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.name = "reg-fixed-voltage",
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.id = 1,
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.dev = {
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.platform_data = &snowball_gpio_en_3v3_data,
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},
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};
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static struct ab8500_gpio_platform_data ab8500_gpio_pdata = {
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.gpio_base = MOP500_AB8500_PIN_GPIO(1),
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.irq_base = MOP500_AB8500_VIR_GPIO_IRQ_BASE,
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/* config_reg is the initial configuration of ab8500 pins.
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* The pins can be configured as GPIO or alt functions based
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* on value present in GpioSel1 to GpioSel6 and AlternatFunction
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* register. This is the array of 7 configuration settings.
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* One has to compile time decide these settings. Below is the
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* explanation of these setting
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* GpioSel1 = 0x00 => Pins GPIO1 to GPIO8 are not used as GPIO
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* GpioSel2 = 0x1E => Pins GPIO10 to GPIO13 are configured as GPIO
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* GpioSel3 = 0x80 => Pin GPIO24 is configured as GPIO
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* GpioSel4 = 0x01 => Pin GPIo25 is configured as GPIO
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* GpioSel5 = 0x7A => Pins GPIO34, GPIO36 to GPIO39 are conf as GPIO
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* GpioSel6 = 0x00 => Pins GPIO41 & GPIo42 are not configured as GPIO
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* AlternaFunction = 0x00 => If Pins GPIO10 to 13 are not configured
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* as GPIO then this register selectes the alternate fucntions
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*/
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.config_reg = {0x00, 0x1E, 0x80, 0x01,
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0x7A, 0x00, 0x00},
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};
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/* ab8500-codec */
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static struct ab8500_codec_platform_data ab8500_codec_pdata = {
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.amics = {
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.mic1_type = AMIC_TYPE_DIFFERENTIAL,
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.mic2_type = AMIC_TYPE_DIFFERENTIAL,
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.mic1a_micbias = AMIC_MICBIAS_VAMIC1,
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.mic1b_micbias = AMIC_MICBIAS_VAMIC1,
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.mic2_micbias = AMIC_MICBIAS_VAMIC2
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},
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.ear_cmv = EAR_CMV_0_95V
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};
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static struct gpio_keys_button snowball_key_array[] = {
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{
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.gpio = 32,
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.type = EV_KEY,
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.code = KEY_1,
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.desc = "userpb",
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.active_low = 1,
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.debounce_interval = 50,
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.wakeup = 1,
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},
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{
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.gpio = 151,
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.type = EV_KEY,
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.code = KEY_2,
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.desc = "extkb1",
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.active_low = 1,
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.debounce_interval = 50,
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.wakeup = 1,
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},
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{
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.gpio = 152,
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.type = EV_KEY,
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.code = KEY_3,
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.desc = "extkb2",
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.active_low = 1,
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.debounce_interval = 50,
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.wakeup = 1,
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},
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{
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.gpio = 161,
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.type = EV_KEY,
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.code = KEY_4,
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.desc = "extkb3",
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.active_low = 1,
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.debounce_interval = 50,
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.wakeup = 1,
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},
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{
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.gpio = 162,
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.type = EV_KEY,
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.code = KEY_5,
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.desc = "extkb4",
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.active_low = 1,
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.debounce_interval = 50,
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.wakeup = 1,
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},
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};
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static struct gpio_keys_platform_data snowball_key_data = {
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.buttons = snowball_key_array,
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.nbuttons = ARRAY_SIZE(snowball_key_array),
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};
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static struct platform_device snowball_key_dev = {
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.name = "gpio-keys",
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.id = -1,
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.dev = {
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.platform_data = &snowball_key_data,
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}
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};
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static struct smsc911x_platform_config snowball_sbnet_cfg = {
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.irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_HIGH,
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.irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL,
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.flags = SMSC911X_USE_16BIT | SMSC911X_FORCE_INTERNAL_PHY,
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.shift = 1,
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};
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static struct resource sbnet_res[] = {
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{
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.name = "smsc911x-memory",
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.start = (0x5000 << 16),
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.end = (0x5000 << 16) + 0xffff,
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.flags = IORESOURCE_MEM,
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},
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{
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.start = NOMADIK_GPIO_TO_IRQ(140),
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.end = NOMADIK_GPIO_TO_IRQ(140),
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.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
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},
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};
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static struct platform_device snowball_sbnet_dev = {
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.name = "smsc911x",
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.num_resources = ARRAY_SIZE(sbnet_res),
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.resource = sbnet_res,
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.dev = {
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.platform_data = &snowball_sbnet_cfg,
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},
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};
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static struct ab8500_platform_data ab8500_platdata = {
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.irq_base = MOP500_AB8500_IRQ_BASE,
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.regulator_reg_init = ab8500_regulator_reg_init,
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.num_regulator_reg_init = ARRAY_SIZE(ab8500_regulator_reg_init),
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.regulator = ab8500_regulators,
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.num_regulator = ARRAY_SIZE(ab8500_regulators),
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.gpio = &ab8500_gpio_pdata,
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.codec = &ab8500_codec_pdata,
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};
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/*
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* Thermal Sensor
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*/
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static struct resource db8500_thsens_resources[] = {
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{
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.name = "IRQ_HOTMON_LOW",
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.start = IRQ_PRCMU_HOTMON_LOW,
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.end = IRQ_PRCMU_HOTMON_LOW,
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.flags = IORESOURCE_IRQ,
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},
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{
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.name = "IRQ_HOTMON_HIGH",
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.start = IRQ_PRCMU_HOTMON_HIGH,
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.end = IRQ_PRCMU_HOTMON_HIGH,
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct db8500_thsens_platform_data db8500_thsens_data = {
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.trip_points[0] = {
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.temp = 70000,
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.type = THERMAL_TRIP_ACTIVE,
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.cdev_name = {
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[0] = "thermal-cpufreq-0",
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},
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},
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.trip_points[1] = {
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.temp = 75000,
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.type = THERMAL_TRIP_ACTIVE,
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.cdev_name = {
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[0] = "thermal-cpufreq-0",
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},
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},
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.trip_points[2] = {
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.temp = 80000,
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.type = THERMAL_TRIP_ACTIVE,
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.cdev_name = {
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[0] = "thermal-cpufreq-0",
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},
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},
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.trip_points[3] = {
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.temp = 85000,
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.type = THERMAL_TRIP_CRITICAL,
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},
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.num_trips = 4,
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};
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static struct platform_device u8500_thsens_device = {
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.name = "db8500-thermal",
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.resource = db8500_thsens_resources,
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.num_resources = ARRAY_SIZE(db8500_thsens_resources),
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.dev = {
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.platform_data = &db8500_thsens_data,
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},
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};
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static struct platform_device u8500_cpufreq_cooling_device = {
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.name = "db8500-cpufreq-cooling",
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};
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/*
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* TPS61052
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*/
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static struct tps6105x_platform_data mop500_tps61052_data = {
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.mode = TPS6105X_MODE_VOLTAGE,
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.regulator_data = &tps61052_regulator,
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};
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/*
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* TC35892
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*/
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static void mop500_tc35892_init(struct tc3589x *tc3589x, unsigned int base)
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{
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struct device *parent = NULL;
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#if 0
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/* FIXME: Is the sdi actually part of tc3589x? */
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parent = tc3589x->dev;
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#endif
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mop500_sdi_tc35892_init(parent);
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}
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static struct tc3589x_gpio_platform_data mop500_tc35892_gpio_data = {
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.gpio_base = MOP500_EGPIO(0),
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.setup = mop500_tc35892_init,
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};
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static struct tc3589x_platform_data mop500_tc35892_data = {
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.block = TC3589x_BLOCK_GPIO,
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.gpio = &mop500_tc35892_gpio_data,
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.irq_base = MOP500_EGPIO_IRQ_BASE,
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};
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static struct lp5521_led_config lp5521_pri_led[] = {
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[0] = {
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.chan_nr = 0,
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.led_current = 0x2f,
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.max_current = 0x5f,
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},
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[1] = {
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.chan_nr = 1,
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.led_current = 0x2f,
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.max_current = 0x5f,
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},
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[2] = {
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.chan_nr = 2,
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.led_current = 0x2f,
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.max_current = 0x5f,
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},
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};
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static struct lp5521_platform_data __initdata lp5521_pri_data = {
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.label = "lp5521_pri",
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.led_config = &lp5521_pri_led[0],
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.num_channels = 3,
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.clock_mode = LP5521_CLOCK_EXT,
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};
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static struct lp5521_led_config lp5521_sec_led[] = {
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[0] = {
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.chan_nr = 0,
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.led_current = 0x2f,
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.max_current = 0x5f,
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},
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[1] = {
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.chan_nr = 1,
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.led_current = 0x2f,
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.max_current = 0x5f,
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},
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[2] = {
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.chan_nr = 2,
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.led_current = 0x2f,
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.max_current = 0x5f,
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},
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};
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static struct lp5521_platform_data __initdata lp5521_sec_data = {
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.label = "lp5521_sec",
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.led_config = &lp5521_sec_led[0],
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.num_channels = 3,
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.clock_mode = LP5521_CLOCK_EXT,
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};
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static struct i2c_board_info __initdata mop500_i2c0_devices[] = {
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{
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I2C_BOARD_INFO("tc3589x", 0x42),
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.irq = NOMADIK_GPIO_TO_IRQ(217),
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.platform_data = &mop500_tc35892_data,
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},
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/* I2C0 devices only available prior to HREFv60 */
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{
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I2C_BOARD_INFO("tps61052", 0x33),
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.platform_data = &mop500_tps61052_data,
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},
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};
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#define NUM_PRE_V60_I2C0_DEVICES 1
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static struct i2c_board_info __initdata mop500_i2c2_devices[] = {
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{
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/* lp5521 LED driver, 1st device */
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I2C_BOARD_INFO("lp5521", 0x33),
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.platform_data = &lp5521_pri_data,
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},
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{
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/* lp5521 LED driver, 2st device */
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I2C_BOARD_INFO("lp5521", 0x34),
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.platform_data = &lp5521_sec_data,
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},
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{
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/* Light sensor Rohm BH1780GLI */
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I2C_BOARD_INFO("bh1780", 0x29),
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},
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};
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static void __init mop500_i2c_init(struct device *parent)
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{
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db8500_add_i2c0(parent, NULL);
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db8500_add_i2c1(parent, NULL);
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db8500_add_i2c2(parent, NULL);
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db8500_add_i2c3(parent, NULL);
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}
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static struct gpio_keys_button mop500_gpio_keys[] = {
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{
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.desc = "SFH7741 Proximity Sensor",
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|
.type = EV_SW,
|
|
.code = SW_FRONT_PROXIMITY,
|
|
.active_low = 0,
|
|
.can_disable = 1,
|
|
}
|
|
};
|
|
|
|
static struct regulator *prox_regulator;
|
|
static int mop500_prox_activate(struct device *dev);
|
|
static void mop500_prox_deactivate(struct device *dev);
|
|
|
|
static struct gpio_keys_platform_data mop500_gpio_keys_data = {
|
|
.buttons = mop500_gpio_keys,
|
|
.nbuttons = ARRAY_SIZE(mop500_gpio_keys),
|
|
.enable = mop500_prox_activate,
|
|
.disable = mop500_prox_deactivate,
|
|
};
|
|
|
|
static struct platform_device mop500_gpio_keys_device = {
|
|
.name = "gpio-keys",
|
|
.id = 0,
|
|
.dev = {
|
|
.platform_data = &mop500_gpio_keys_data,
|
|
},
|
|
};
|
|
|
|
static int mop500_prox_activate(struct device *dev)
|
|
{
|
|
prox_regulator = regulator_get(&mop500_gpio_keys_device.dev,
|
|
"vcc");
|
|
if (IS_ERR(prox_regulator)) {
|
|
dev_err(&mop500_gpio_keys_device.dev,
|
|
"no regulator\n");
|
|
return PTR_ERR(prox_regulator);
|
|
}
|
|
regulator_enable(prox_regulator);
|
|
return 0;
|
|
}
|
|
|
|
static void mop500_prox_deactivate(struct device *dev)
|
|
{
|
|
regulator_disable(prox_regulator);
|
|
regulator_put(prox_regulator);
|
|
}
|
|
|
|
static struct cryp_platform_data u8500_cryp1_platform_data = {
|
|
.mem_to_engine = {
|
|
.dir = STEDMA40_MEM_TO_PERIPH,
|
|
.src_dev_type = STEDMA40_DEV_SRC_MEMORY,
|
|
.dst_dev_type = DB8500_DMA_DEV48_CAC1_TX,
|
|
.src_info.data_width = STEDMA40_WORD_WIDTH,
|
|
.dst_info.data_width = STEDMA40_WORD_WIDTH,
|
|
.mode = STEDMA40_MODE_LOGICAL,
|
|
.src_info.psize = STEDMA40_PSIZE_LOG_4,
|
|
.dst_info.psize = STEDMA40_PSIZE_LOG_4,
|
|
},
|
|
.engine_to_mem = {
|
|
.dir = STEDMA40_PERIPH_TO_MEM,
|
|
.src_dev_type = DB8500_DMA_DEV48_CAC1_RX,
|
|
.dst_dev_type = STEDMA40_DEV_DST_MEMORY,
|
|
.src_info.data_width = STEDMA40_WORD_WIDTH,
|
|
.dst_info.data_width = STEDMA40_WORD_WIDTH,
|
|
.mode = STEDMA40_MODE_LOGICAL,
|
|
.src_info.psize = STEDMA40_PSIZE_LOG_4,
|
|
.dst_info.psize = STEDMA40_PSIZE_LOG_4,
|
|
}
|
|
};
|
|
|
|
static struct stedma40_chan_cfg u8500_hash_dma_cfg_tx = {
|
|
.dir = STEDMA40_MEM_TO_PERIPH,
|
|
.src_dev_type = STEDMA40_DEV_SRC_MEMORY,
|
|
.dst_dev_type = DB8500_DMA_DEV50_HAC1_TX,
|
|
.src_info.data_width = STEDMA40_WORD_WIDTH,
|
|
.dst_info.data_width = STEDMA40_WORD_WIDTH,
|
|
.mode = STEDMA40_MODE_LOGICAL,
|
|
.src_info.psize = STEDMA40_PSIZE_LOG_16,
|
|
.dst_info.psize = STEDMA40_PSIZE_LOG_16,
|
|
};
|
|
|
|
static struct hash_platform_data u8500_hash1_platform_data = {
|
|
.mem_to_engine = &u8500_hash_dma_cfg_tx,
|
|
.dma_filter = stedma40_filter,
|
|
};
|
|
|
|
/* add any platform devices here - TODO */
|
|
static struct platform_device *mop500_platform_devs[] __initdata = {
|
|
&mop500_gpio_keys_device,
|
|
};
|
|
|
|
#ifdef CONFIG_STE_DMA40
|
|
static struct stedma40_chan_cfg ssp0_dma_cfg_rx = {
|
|
.mode = STEDMA40_MODE_LOGICAL,
|
|
.dir = STEDMA40_PERIPH_TO_MEM,
|
|
.src_dev_type = DB8500_DMA_DEV8_SSP0_RX,
|
|
.dst_dev_type = STEDMA40_DEV_DST_MEMORY,
|
|
.src_info.data_width = STEDMA40_BYTE_WIDTH,
|
|
.dst_info.data_width = STEDMA40_BYTE_WIDTH,
|
|
};
|
|
|
|
static struct stedma40_chan_cfg ssp0_dma_cfg_tx = {
|
|
.mode = STEDMA40_MODE_LOGICAL,
|
|
.dir = STEDMA40_MEM_TO_PERIPH,
|
|
.src_dev_type = STEDMA40_DEV_SRC_MEMORY,
|
|
.dst_dev_type = DB8500_DMA_DEV8_SSP0_TX,
|
|
.src_info.data_width = STEDMA40_BYTE_WIDTH,
|
|
.dst_info.data_width = STEDMA40_BYTE_WIDTH,
|
|
};
|
|
#endif
|
|
|
|
struct pl022_ssp_controller ssp0_plat = {
|
|
.bus_id = 0,
|
|
#ifdef CONFIG_STE_DMA40
|
|
.enable_dma = 1,
|
|
.dma_filter = stedma40_filter,
|
|
.dma_rx_param = &ssp0_dma_cfg_rx,
|
|
.dma_tx_param = &ssp0_dma_cfg_tx,
|
|
#else
|
|
.enable_dma = 0,
|
|
#endif
|
|
/* on this platform, gpio 31,142,144,214 &
|
|
* 224 are connected as chip selects
|
|
*/
|
|
.num_chipselect = 5,
|
|
};
|
|
|
|
static void __init mop500_spi_init(struct device *parent)
|
|
{
|
|
db8500_add_ssp0(parent, &ssp0_plat);
|
|
}
|
|
|
|
#ifdef CONFIG_STE_DMA40
|
|
static struct stedma40_chan_cfg uart0_dma_cfg_rx = {
|
|
.mode = STEDMA40_MODE_LOGICAL,
|
|
.dir = STEDMA40_PERIPH_TO_MEM,
|
|
.src_dev_type = DB8500_DMA_DEV13_UART0_RX,
|
|
.dst_dev_type = STEDMA40_DEV_DST_MEMORY,
|
|
.src_info.data_width = STEDMA40_BYTE_WIDTH,
|
|
.dst_info.data_width = STEDMA40_BYTE_WIDTH,
|
|
};
|
|
|
|
static struct stedma40_chan_cfg uart0_dma_cfg_tx = {
|
|
.mode = STEDMA40_MODE_LOGICAL,
|
|
.dir = STEDMA40_MEM_TO_PERIPH,
|
|
.src_dev_type = STEDMA40_DEV_SRC_MEMORY,
|
|
.dst_dev_type = DB8500_DMA_DEV13_UART0_TX,
|
|
.src_info.data_width = STEDMA40_BYTE_WIDTH,
|
|
.dst_info.data_width = STEDMA40_BYTE_WIDTH,
|
|
};
|
|
|
|
static struct stedma40_chan_cfg uart1_dma_cfg_rx = {
|
|
.mode = STEDMA40_MODE_LOGICAL,
|
|
.dir = STEDMA40_PERIPH_TO_MEM,
|
|
.src_dev_type = DB8500_DMA_DEV12_UART1_RX,
|
|
.dst_dev_type = STEDMA40_DEV_DST_MEMORY,
|
|
.src_info.data_width = STEDMA40_BYTE_WIDTH,
|
|
.dst_info.data_width = STEDMA40_BYTE_WIDTH,
|
|
};
|
|
|
|
static struct stedma40_chan_cfg uart1_dma_cfg_tx = {
|
|
.mode = STEDMA40_MODE_LOGICAL,
|
|
.dir = STEDMA40_MEM_TO_PERIPH,
|
|
.src_dev_type = STEDMA40_DEV_SRC_MEMORY,
|
|
.dst_dev_type = DB8500_DMA_DEV12_UART1_TX,
|
|
.src_info.data_width = STEDMA40_BYTE_WIDTH,
|
|
.dst_info.data_width = STEDMA40_BYTE_WIDTH,
|
|
};
|
|
|
|
static struct stedma40_chan_cfg uart2_dma_cfg_rx = {
|
|
.mode = STEDMA40_MODE_LOGICAL,
|
|
.dir = STEDMA40_PERIPH_TO_MEM,
|
|
.src_dev_type = DB8500_DMA_DEV11_UART2_RX,
|
|
.dst_dev_type = STEDMA40_DEV_DST_MEMORY,
|
|
.src_info.data_width = STEDMA40_BYTE_WIDTH,
|
|
.dst_info.data_width = STEDMA40_BYTE_WIDTH,
|
|
};
|
|
|
|
static struct stedma40_chan_cfg uart2_dma_cfg_tx = {
|
|
.mode = STEDMA40_MODE_LOGICAL,
|
|
.dir = STEDMA40_MEM_TO_PERIPH,
|
|
.src_dev_type = STEDMA40_DEV_SRC_MEMORY,
|
|
.dst_dev_type = DB8500_DMA_DEV11_UART2_TX,
|
|
.src_info.data_width = STEDMA40_BYTE_WIDTH,
|
|
.dst_info.data_width = STEDMA40_BYTE_WIDTH,
|
|
};
|
|
#endif
|
|
|
|
struct amba_pl011_data uart0_plat = {
|
|
#ifdef CONFIG_STE_DMA40
|
|
.dma_filter = stedma40_filter,
|
|
.dma_rx_param = &uart0_dma_cfg_rx,
|
|
.dma_tx_param = &uart0_dma_cfg_tx,
|
|
#endif
|
|
};
|
|
|
|
struct amba_pl011_data uart1_plat = {
|
|
#ifdef CONFIG_STE_DMA40
|
|
.dma_filter = stedma40_filter,
|
|
.dma_rx_param = &uart1_dma_cfg_rx,
|
|
.dma_tx_param = &uart1_dma_cfg_tx,
|
|
#endif
|
|
};
|
|
|
|
struct amba_pl011_data uart2_plat = {
|
|
#ifdef CONFIG_STE_DMA40
|
|
.dma_filter = stedma40_filter,
|
|
.dma_rx_param = &uart2_dma_cfg_rx,
|
|
.dma_tx_param = &uart2_dma_cfg_tx,
|
|
#endif
|
|
};
|
|
|
|
static void __init mop500_uart_init(struct device *parent)
|
|
{
|
|
db8500_add_uart0(parent, &uart0_plat);
|
|
db8500_add_uart1(parent, &uart1_plat);
|
|
db8500_add_uart2(parent, &uart2_plat);
|
|
}
|
|
|
|
static void __init u8500_cryp1_hash1_init(struct device *parent)
|
|
{
|
|
db8500_add_cryp1(parent, &u8500_cryp1_platform_data);
|
|
db8500_add_hash1(parent, &u8500_hash1_platform_data);
|
|
}
|
|
|
|
static struct platform_device *snowball_platform_devs[] __initdata = {
|
|
&snowball_led_dev,
|
|
&snowball_key_dev,
|
|
&snowball_sbnet_dev,
|
|
&snowball_gpio_en_3v3_regulator_dev,
|
|
&u8500_thsens_device,
|
|
&u8500_cpufreq_cooling_device,
|
|
};
|
|
|
|
static void __init mop500_init_machine(void)
|
|
{
|
|
struct device *parent = NULL;
|
|
int i2c0_devs;
|
|
int i;
|
|
|
|
mop500_gpio_keys[0].gpio = GPIO_PROX_SENSOR;
|
|
|
|
mop500_pinmaps_init();
|
|
parent = u8500_init_devices(&ab8500_platdata);
|
|
|
|
for (i = 0; i < ARRAY_SIZE(mop500_platform_devs); i++)
|
|
mop500_platform_devs[i]->dev.parent = parent;
|
|
|
|
platform_add_devices(mop500_platform_devs,
|
|
ARRAY_SIZE(mop500_platform_devs));
|
|
|
|
mop500_i2c_init(parent);
|
|
mop500_sdi_init(parent);
|
|
mop500_spi_init(parent);
|
|
mop500_audio_init(parent);
|
|
mop500_uart_init(parent);
|
|
|
|
u8500_cryp1_hash1_init(parent);
|
|
|
|
i2c0_devs = ARRAY_SIZE(mop500_i2c0_devices);
|
|
|
|
i2c_register_board_info(0, mop500_i2c0_devices, i2c0_devs);
|
|
i2c_register_board_info(2, mop500_i2c2_devices,
|
|
ARRAY_SIZE(mop500_i2c2_devices));
|
|
|
|
/* This board has full regulator constraints */
|
|
regulator_has_full_constraints();
|
|
}
|
|
|
|
static void __init snowball_init_machine(void)
|
|
{
|
|
struct device *parent = NULL;
|
|
int i;
|
|
|
|
snowball_pinmaps_init();
|
|
parent = u8500_init_devices(&ab8500_platdata);
|
|
|
|
for (i = 0; i < ARRAY_SIZE(snowball_platform_devs); i++)
|
|
snowball_platform_devs[i]->dev.parent = parent;
|
|
|
|
platform_add_devices(snowball_platform_devs,
|
|
ARRAY_SIZE(snowball_platform_devs));
|
|
|
|
mop500_i2c_init(parent);
|
|
snowball_sdi_init(parent);
|
|
mop500_spi_init(parent);
|
|
mop500_audio_init(parent);
|
|
mop500_uart_init(parent);
|
|
|
|
/* This board has full regulator constraints */
|
|
regulator_has_full_constraints();
|
|
}
|
|
|
|
static void __init hrefv60_init_machine(void)
|
|
{
|
|
struct device *parent = NULL;
|
|
int i2c0_devs;
|
|
int i;
|
|
|
|
/*
|
|
* The HREFv60 board removed a GPIO expander and routed
|
|
* all these GPIO pins to the internal GPIO controller
|
|
* instead.
|
|
*/
|
|
mop500_gpio_keys[0].gpio = HREFV60_PROX_SENSE_GPIO;
|
|
|
|
hrefv60_pinmaps_init();
|
|
parent = u8500_init_devices(&ab8500_platdata);
|
|
|
|
for (i = 0; i < ARRAY_SIZE(mop500_platform_devs); i++)
|
|
mop500_platform_devs[i]->dev.parent = parent;
|
|
|
|
platform_add_devices(mop500_platform_devs,
|
|
ARRAY_SIZE(mop500_platform_devs));
|
|
|
|
mop500_i2c_init(parent);
|
|
hrefv60_sdi_init(parent);
|
|
mop500_spi_init(parent);
|
|
mop500_audio_init(parent);
|
|
mop500_uart_init(parent);
|
|
|
|
i2c0_devs = ARRAY_SIZE(mop500_i2c0_devices);
|
|
|
|
i2c0_devs -= NUM_PRE_V60_I2C0_DEVICES;
|
|
|
|
i2c_register_board_info(0, mop500_i2c0_devices, i2c0_devs);
|
|
i2c_register_board_info(2, mop500_i2c2_devices,
|
|
ARRAY_SIZE(mop500_i2c2_devices));
|
|
|
|
/* This board has full regulator constraints */
|
|
regulator_has_full_constraints();
|
|
}
|
|
|
|
MACHINE_START(U8500, "ST-Ericsson MOP500 platform")
|
|
/* Maintainer: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com> */
|
|
.atag_offset = 0x100,
|
|
.smp = smp_ops(ux500_smp_ops),
|
|
.map_io = u8500_map_io,
|
|
.init_irq = ux500_init_irq,
|
|
/* we re-use nomadik timer here */
|
|
.timer = &ux500_timer,
|
|
.handle_irq = gic_handle_irq,
|
|
.init_machine = mop500_init_machine,
|
|
.init_late = ux500_init_late,
|
|
MACHINE_END
|
|
|
|
MACHINE_START(U8520, "ST-Ericsson U8520 Platform HREFP520")
|
|
.atag_offset = 0x100,
|
|
.map_io = u8500_map_io,
|
|
.init_irq = ux500_init_irq,
|
|
.timer = &ux500_timer,
|
|
.handle_irq = gic_handle_irq,
|
|
.init_machine = mop500_init_machine,
|
|
.init_late = ux500_init_late,
|
|
MACHINE_END
|
|
|
|
MACHINE_START(HREFV60, "ST-Ericsson U8500 Platform HREFv60+")
|
|
.atag_offset = 0x100,
|
|
.smp = smp_ops(ux500_smp_ops),
|
|
.map_io = u8500_map_io,
|
|
.init_irq = ux500_init_irq,
|
|
.timer = &ux500_timer,
|
|
.handle_irq = gic_handle_irq,
|
|
.init_machine = hrefv60_init_machine,
|
|
.init_late = ux500_init_late,
|
|
MACHINE_END
|
|
|
|
MACHINE_START(SNOWBALL, "Calao Systems Snowball platform")
|
|
.atag_offset = 0x100,
|
|
.smp = smp_ops(ux500_smp_ops),
|
|
.map_io = u8500_map_io,
|
|
.init_irq = ux500_init_irq,
|
|
/* we re-use nomadik timer here */
|
|
.timer = &ux500_timer,
|
|
.handle_irq = gic_handle_irq,
|
|
.init_machine = snowball_init_machine,
|
|
.init_late = NULL,
|
|
MACHINE_END
|