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5a35435ef4
There are also PPC64, ARM and ARM64 based SOCs with a QUICC Engine, and the core QE code as well as net/wan/fsl_ucc_hdlc and tty/serial/ucc_uart has now been modified to not rely on ppcisms. So extend the architectures that can select QUICC_ENGINE, and add the rather modest requirements of OF && HAS_IOMEM. The core code as well as the ucc_uart driver has been tested on an LS1021A (arm), and it has also been tested that the QE code still works on an mpc8309 (ppc). Qiang Zhao has tested that the QE-HDLC code that gets enabled with this works on ARM64. Reviewed-by: Timur Tabi <timur@kernel.org> Signed-off-by: Rasmus Villemoes <linux@rasmusvillemoes.dk> Signed-off-by: Li Yang <leoyang.li@nxp.com>
45 lines
975 B
Plaintext
45 lines
975 B
Plaintext
# SPDX-License-Identifier: GPL-2.0-only
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#
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# QE Communication options
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#
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config QUICC_ENGINE
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bool "QUICC Engine (QE) framework support"
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depends on OF && HAS_IOMEM
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depends on PPC || ARM || ARM64 || COMPILE_TEST
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select GENERIC_ALLOCATOR
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select CRC32
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help
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The QUICC Engine (QE) is a new generation of communications
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coprocessors on Freescale embedded CPUs (akin to CPM in older chips).
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Selecting this option means that you wish to build a kernel
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for a machine with a QE coprocessor.
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config UCC_SLOW
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bool
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default y if SERIAL_QE
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help
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This option provides qe_lib support to UCC slow
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protocols: UART, BISYNC, QMC
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config UCC_FAST
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bool
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default y if UCC_GETH || QE_TDM
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help
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This option provides qe_lib support to UCC fast
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protocols: HDLC, Ethernet, ATM, transparent
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config UCC
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bool
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default y if UCC_FAST || UCC_SLOW
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config QE_TDM
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bool
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default y if FSL_UCC_HDLC
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config QE_USB
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bool
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default y if USB_FSL_QE
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help
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QE USB Controller support
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