mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-11-30 01:16:41 +07:00
30da552428
commit 2ca1af9aa3285c6a5f103ed31ad09f7399fc65d7 "PCI: MSI: Remove unsafe and unnecessary hardware access" changed read_msi_msg_desc() to return the last MSI message written instead of reading it from the device, since it may be called while the device is in a reduced power state. However, the pSeries platform code really does need to read messages from the device, since they are initially written by firmware. Therefore: - Restore the previous behaviour of read_msi_msg_desc() - Add new functions get_cached_msi_msg{,_desc}() which return the last MSI message written - Use the new functions where appropriate Acked-by: Michael Ellerman <michael@ellerman.id.au> Signed-off-by: Ben Hutchings <bhutchings@solarflare.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
212 lines
4.2 KiB
C
212 lines
4.2 KiB
C
/*
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* MSI hooks for standard x86 apic
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*/
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#include <linux/pci.h>
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#include <linux/irq.h>
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#include <linux/msi.h>
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#include <linux/dmar.h>
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#include <asm/smp.h>
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#include <asm/msidef.h>
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static struct irq_chip ia64_msi_chip;
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#ifdef CONFIG_SMP
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static int ia64_set_msi_irq_affinity(unsigned int irq,
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const cpumask_t *cpu_mask)
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{
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struct msi_msg msg;
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u32 addr, data;
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int cpu = first_cpu(*cpu_mask);
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if (!cpu_online(cpu))
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return -1;
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if (irq_prepare_move(irq, cpu))
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return -1;
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get_cached_msi_msg(irq, &msg);
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addr = msg.address_lo;
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addr &= MSI_ADDR_DEST_ID_MASK;
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addr |= MSI_ADDR_DEST_ID_CPU(cpu_physical_id(cpu));
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msg.address_lo = addr;
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data = msg.data;
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data &= MSI_DATA_VECTOR_MASK;
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data |= MSI_DATA_VECTOR(irq_to_vector(irq));
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msg.data = data;
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write_msi_msg(irq, &msg);
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cpumask_copy(irq_desc[irq].affinity, cpumask_of(cpu));
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return 0;
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}
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#endif /* CONFIG_SMP */
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int ia64_setup_msi_irq(struct pci_dev *pdev, struct msi_desc *desc)
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{
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struct msi_msg msg;
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unsigned long dest_phys_id;
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int irq, vector;
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cpumask_t mask;
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irq = create_irq();
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if (irq < 0)
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return irq;
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set_irq_msi(irq, desc);
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cpus_and(mask, irq_to_domain(irq), cpu_online_map);
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dest_phys_id = cpu_physical_id(first_cpu(mask));
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vector = irq_to_vector(irq);
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msg.address_hi = 0;
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msg.address_lo =
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MSI_ADDR_HEADER |
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MSI_ADDR_DEST_MODE_PHYS |
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MSI_ADDR_REDIRECTION_CPU |
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MSI_ADDR_DEST_ID_CPU(dest_phys_id);
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msg.data =
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MSI_DATA_TRIGGER_EDGE |
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MSI_DATA_LEVEL_ASSERT |
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MSI_DATA_DELIVERY_FIXED |
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MSI_DATA_VECTOR(vector);
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write_msi_msg(irq, &msg);
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set_irq_chip_and_handler(irq, &ia64_msi_chip, handle_edge_irq);
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return 0;
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}
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void ia64_teardown_msi_irq(unsigned int irq)
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{
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destroy_irq(irq);
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}
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static void ia64_ack_msi_irq(unsigned int irq)
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{
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irq_complete_move(irq);
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move_native_irq(irq);
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ia64_eoi();
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}
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static int ia64_msi_retrigger_irq(unsigned int irq)
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{
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unsigned int vector = irq_to_vector(irq);
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ia64_resend_irq(vector);
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return 1;
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}
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/*
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* Generic ops used on most IA64 platforms.
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*/
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static struct irq_chip ia64_msi_chip = {
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.name = "PCI-MSI",
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.mask = mask_msi_irq,
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.unmask = unmask_msi_irq,
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.ack = ia64_ack_msi_irq,
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#ifdef CONFIG_SMP
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.set_affinity = ia64_set_msi_irq_affinity,
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#endif
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.retrigger = ia64_msi_retrigger_irq,
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};
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int arch_setup_msi_irq(struct pci_dev *pdev, struct msi_desc *desc)
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{
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if (platform_setup_msi_irq)
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return platform_setup_msi_irq(pdev, desc);
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return ia64_setup_msi_irq(pdev, desc);
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}
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void arch_teardown_msi_irq(unsigned int irq)
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{
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if (platform_teardown_msi_irq)
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return platform_teardown_msi_irq(irq);
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return ia64_teardown_msi_irq(irq);
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}
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#ifdef CONFIG_DMAR
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#ifdef CONFIG_SMP
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static int dmar_msi_set_affinity(unsigned int irq, const struct cpumask *mask)
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{
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struct irq_cfg *cfg = irq_cfg + irq;
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struct msi_msg msg;
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int cpu = cpumask_first(mask);
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if (!cpu_online(cpu))
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return -1;
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if (irq_prepare_move(irq, cpu))
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return -1;
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dmar_msi_read(irq, &msg);
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msg.data &= ~MSI_DATA_VECTOR_MASK;
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msg.data |= MSI_DATA_VECTOR(cfg->vector);
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msg.address_lo &= ~MSI_ADDR_DEST_ID_MASK;
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msg.address_lo |= MSI_ADDR_DEST_ID_CPU(cpu_physical_id(cpu));
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dmar_msi_write(irq, &msg);
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cpumask_copy(irq_desc[irq].affinity, mask);
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return 0;
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}
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#endif /* CONFIG_SMP */
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static struct irq_chip dmar_msi_type = {
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.name = "DMAR_MSI",
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.unmask = dmar_msi_unmask,
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.mask = dmar_msi_mask,
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.ack = ia64_ack_msi_irq,
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#ifdef CONFIG_SMP
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.set_affinity = dmar_msi_set_affinity,
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#endif
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.retrigger = ia64_msi_retrigger_irq,
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};
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static int
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msi_compose_msg(struct pci_dev *pdev, unsigned int irq, struct msi_msg *msg)
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{
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struct irq_cfg *cfg = irq_cfg + irq;
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unsigned dest;
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cpumask_t mask;
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cpus_and(mask, irq_to_domain(irq), cpu_online_map);
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dest = cpu_physical_id(first_cpu(mask));
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msg->address_hi = 0;
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msg->address_lo =
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MSI_ADDR_HEADER |
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MSI_ADDR_DEST_MODE_PHYS |
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MSI_ADDR_REDIRECTION_CPU |
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MSI_ADDR_DEST_ID_CPU(dest);
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msg->data =
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MSI_DATA_TRIGGER_EDGE |
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MSI_DATA_LEVEL_ASSERT |
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MSI_DATA_DELIVERY_FIXED |
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MSI_DATA_VECTOR(cfg->vector);
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return 0;
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}
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int arch_setup_dmar_msi(unsigned int irq)
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{
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int ret;
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struct msi_msg msg;
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ret = msi_compose_msg(NULL, irq, &msg);
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if (ret < 0)
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return ret;
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dmar_msi_write(irq, &msg);
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set_irq_chip_and_handler_name(irq, &dmar_msi_type, handle_edge_irq,
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"edge");
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return 0;
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}
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#endif /* CONFIG_DMAR */
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