mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-05 06:56:52 +07:00
50a23e6eec
The patch below updates broken web addresses in the arch directory. Signed-off-by: Justin P. Mattock <justinmattock@gmail.com> Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org> Cc: Finn Thain <fthain@telegraphics.com.au> Cc: Randy Dunlap <rdunlap@xenotime.net> Reviewed-by: Finn Thain <fthain@telegraphics.com.au> Signed-off-by: Jiri Kosina <jkosina@suse.cz>
184 lines
4.7 KiB
C
184 lines
4.7 KiB
C
/* IEEE754 floating point arithmetic
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* single precision
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*/
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/*
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* MIPS floating point support
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* Copyright (C) 1994-2000 Algorithmics Ltd.
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*
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* ########################################################################
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*
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* This program is free software; you can distribute it and/or modify it
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* under the terms of the GNU General Public License (Version 2) as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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* for more details.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
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*
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* ########################################################################
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*/
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#include "ieee754sp.h"
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ieee754sp ieee754sp_sub(ieee754sp x, ieee754sp y)
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{
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COMPXSP;
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COMPYSP;
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EXPLODEXSP;
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EXPLODEYSP;
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CLEARCX;
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FLUSHXSP;
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FLUSHYSP;
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switch (CLPAIR(xc, yc)) {
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case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_QNAN):
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case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_SNAN):
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case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_SNAN):
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case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_SNAN):
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case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_SNAN):
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case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_SNAN):
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case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_SNAN):
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case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_ZERO):
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case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_NORM):
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case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_DNORM):
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case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_INF):
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SETCX(IEEE754_INVALID_OPERATION);
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return ieee754sp_nanxcpt(ieee754sp_indef(), "sub", x, y);
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case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_QNAN):
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case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_QNAN):
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case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_QNAN):
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case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_QNAN):
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return y;
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case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_QNAN):
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case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_ZERO):
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case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_NORM):
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case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_DNORM):
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case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_INF):
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return x;
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/* Infinity handling
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*/
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case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_INF):
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if (xs != ys)
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return x;
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SETCX(IEEE754_INVALID_OPERATION);
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return ieee754sp_xcpt(ieee754sp_indef(), "sub", x, y);
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case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_INF):
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case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_INF):
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case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_INF):
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return ieee754sp_inf(ys ^ 1);
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case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_ZERO):
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case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_NORM):
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case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_DNORM):
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return x;
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/* Zero handling
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*/
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case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_ZERO):
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if (xs != ys)
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return x;
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else
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return ieee754sp_zero(ieee754_csr.rm ==
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IEEE754_RD);
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case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_ZERO):
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case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_ZERO):
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return x;
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case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_NORM):
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case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_DNORM):
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/* quick fix up */
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DPSIGN(y) ^= 1;
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return y;
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case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_DNORM):
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SPDNORMX;
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case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_DNORM):
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SPDNORMY;
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break;
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case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_NORM):
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SPDNORMX;
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break;
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case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_NORM):
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break;
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}
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/* flip sign of y and handle as add */
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ys ^= 1;
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assert(xm & SP_HIDDEN_BIT);
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assert(ym & SP_HIDDEN_BIT);
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/* provide guard,round and stick bit space */
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xm <<= 3;
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ym <<= 3;
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if (xe > ye) {
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/* have to shift y fraction right to align
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*/
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int s = xe - ye;
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SPXSRSYn(s);
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} else if (ye > xe) {
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/* have to shift x fraction right to align
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*/
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int s = ye - xe;
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SPXSRSXn(s);
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}
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assert(xe == ye);
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assert(xe <= SP_EMAX);
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if (xs == ys) {
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/* generate 28 bit result of adding two 27 bit numbers
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*/
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xm = xm + ym;
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xe = xe;
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xs = xs;
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if (xm >> (SP_MBITS + 1 + 3)) { /* carry out */
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SPXSRSX1(); /* shift preserving sticky */
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}
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} else {
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if (xm >= ym) {
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xm = xm - ym;
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xe = xe;
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xs = xs;
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} else {
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xm = ym - xm;
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xe = xe;
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xs = ys;
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}
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if (xm == 0) {
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if (ieee754_csr.rm == IEEE754_RD)
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return ieee754sp_zero(1); /* round negative inf. => sign = -1 */
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else
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return ieee754sp_zero(0); /* other round modes => sign = 1 */
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}
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/* normalize to rounding precision
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*/
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while ((xm >> (SP_MBITS + 3)) == 0) {
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xm <<= 1;
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xe--;
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}
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}
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SPNORMRET2(xs, xe, xm, "sub", x, y);
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}
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