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a278e7ea60
If you compile with KVM but without CONFIG_HAVE_HW_BREAKPOINT you fail at linking with: arch/powerpc/kvm/book3s_hv_rmhandlers.o:(.text+0x708): undefined reference to `dawr_force_enable' This was caused by commitc1fe190c06("powerpc: Add force enable of DAWR on P9 option"). This moves a bunch of code around to fix this. It moves a lot of the DAWR code in a new file and creates a new CONFIG_PPC_DAWR to enable compiling it. Fixes:c1fe190c06("powerpc: Add force enable of DAWR on P9 option") Signed-off-by: Michael Neuling <mikey@neuling.org> [mpe: Minor formatting in set_dawr()] Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
102 lines
2.4 KiB
C
102 lines
2.4 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* DAWR infrastructure
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*
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* Copyright 2019, Michael Neuling, IBM Corporation.
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*/
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#include <linux/types.h>
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#include <linux/export.h>
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#include <linux/fs.h>
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#include <linux/debugfs.h>
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#include <asm/debugfs.h>
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#include <asm/machdep.h>
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#include <asm/hvcall.h>
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bool dawr_force_enable;
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EXPORT_SYMBOL_GPL(dawr_force_enable);
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int set_dawr(struct arch_hw_breakpoint *brk)
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{
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unsigned long dawr, dawrx, mrd;
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dawr = brk->address;
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dawrx = (brk->type & (HW_BRK_TYPE_READ | HW_BRK_TYPE_WRITE))
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<< (63 - 58);
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dawrx |= ((brk->type & (HW_BRK_TYPE_TRANSLATE)) >> 2) << (63 - 59);
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dawrx |= (brk->type & (HW_BRK_TYPE_PRIV_ALL)) >> 3;
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/*
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* DAWR length is stored in field MDR bits 48:53. Matches range in
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* doublewords (64 bits) baised by -1 eg. 0b000000=1DW and
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* 0b111111=64DW.
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* brk->len is in bytes.
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* This aligns up to double word size, shifts and does the bias.
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*/
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mrd = ((brk->len + 7) >> 3) - 1;
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dawrx |= (mrd & 0x3f) << (63 - 53);
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if (ppc_md.set_dawr)
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return ppc_md.set_dawr(dawr, dawrx);
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mtspr(SPRN_DAWR, dawr);
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mtspr(SPRN_DAWRX, dawrx);
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return 0;
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}
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static void set_dawr_cb(void *info)
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{
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set_dawr(info);
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}
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static ssize_t dawr_write_file_bool(struct file *file,
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const char __user *user_buf,
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size_t count, loff_t *ppos)
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{
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struct arch_hw_breakpoint null_brk = {0, 0, 0};
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size_t rc;
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/* Send error to user if they hypervisor won't allow us to write DAWR */
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if (!dawr_force_enable &&
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firmware_has_feature(FW_FEATURE_LPAR) &&
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set_dawr(&null_brk) != H_SUCCESS)
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return -ENODEV;
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rc = debugfs_write_file_bool(file, user_buf, count, ppos);
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if (rc)
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return rc;
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/* If we are clearing, make sure all CPUs have the DAWR cleared */
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if (!dawr_force_enable)
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smp_call_function(set_dawr_cb, &null_brk, 0);
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return rc;
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}
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static const struct file_operations dawr_enable_fops = {
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.read = debugfs_read_file_bool,
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.write = dawr_write_file_bool,
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.open = simple_open,
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.llseek = default_llseek,
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};
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static int __init dawr_force_setup(void)
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{
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if (cpu_has_feature(CPU_FTR_DAWR)) {
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/* Don't setup sysfs file for user control on P8 */
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dawr_force_enable = true;
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return 0;
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}
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if (PVR_VER(mfspr(SPRN_PVR)) == PVR_POWER9) {
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/* Turn DAWR off by default, but allow admin to turn it on */
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debugfs_create_file_unsafe("dawr_enable_dangerous", 0600,
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powerpc_debugfs_root,
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&dawr_force_enable,
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&dawr_enable_fops);
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}
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return 0;
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}
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arch_initcall(dawr_force_setup);
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